REG OFFSET
(hex)
NAME
DESCRIPTION
Floppy Data Rate Select Shadow
Bit[0] Data Rate Select 0
Bit[1] Data Rate Select 1
Bit[2] PRECOMP 0
Floppy Data Rate
1F
Select Shadow
(R)
Bit[3] PRECOMP 1
Bit[4] PRECOMP 2
Bit[5] Reserved
Bit[6] Power Down
Bit[7] Soft Reset
UART1 FIFO
20
UART FIFO Control Shadow 1
Control Shadow
Bit[0] FIFO Enable
(R)
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
UART FIFO Control Shadow 2
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
UART2 FIFO Control
Shadow
21
(R)
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
SMSC DS – LPC47M14X
Page 136
Rev. 03/19/2001
SMSC [ SMSC CORPORATION ]
