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LPC47B27X 参数 Datasheet PDF下载

LPC47B27X图片预览
型号: LPC47B27X
PDF下载: 下载PDF文件 查看货源
内容描述: 100引脚增强型超级I / O控制器与LPC接口 [100 PIN ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE]
分类和应用: 控制器PC
文件页数/大小: 196 页 / 1189 K
品牌: SMSC [ SMSC CORPORATION ]
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Table 20 - Skip Bit vs Read Data Command  
DATA ADDRESS  
SK BIT  
VALUE  
MARK TYPE  
RESULTS  
ENCOUNTERED  
SECTOR CM BIT OF DESCRIPTION OF  
READ?  
ST2 SET?  
RESULTS  
Normal  
0
0
Normal Data  
Deleted Data  
Yes  
No  
termination.  
Address not  
incremented. Next  
sector not  
Yes  
Yes  
searched for.  
Normal  
1
1
Normal Data  
Deleted Data  
Yes  
No  
No  
termination.  
Normal  
Yes  
termination.  
Sector not read  
("skipped").  
Read Deleted Data  
This command is the same as the Read Data command, only it operates on sectors that contain a Deleted Data Address  
Mark at the beginning of a Data Field.  
Table 21 describes the effect of the SK bit on the Read Deleted Data command execution and results.  
Except where noted in Table 21, the C or R value of the sector address is automatically incremented (see Table 22).  
Table 21 - Skip Bit vs. Read Deleted Data Command  
DATA ADDRESS  
SK BIT  
VALUE  
MARK TYPE  
RESULTS  
ENCOUNTERED  
SECTOR CM BIT OF DESCRIPTION OF  
READ?  
ST2 SET?  
RESULTS  
0
Normal Data  
Yes  
Yes  
Address not  
incremented. Next  
sector not  
searched for.  
Normal  
0
1
Deleted Data  
Normal Data  
Yes  
No  
No  
termination.  
Normal  
Yes  
termination.  
Sector not read  
("skipped").  
Normal  
1
Deleted Data  
Yes  
No  
termination.  
Read A Track  
This command is similar to the Read Data command except that the entire data field is read continuously from each of  
the sectors of a track. Immediately after encountering a pulse on the nINDEX pin, the FDC starts to read all data fields  
on the track as continuous blocks of data without regard to logical sector numbers. If the FDC finds an error in the ID or  
DATA CRC check bytes, it continues to read data from the track and sets the appropriate error bits at the end of the  
command. The FDC compares the ID information read from each sector with the specified value in the command and  
sets the ND flag of Status Register 1 to a “1” if there no comparison. Multi-track or skip operations are not allowed with  
this command. The MT and SK bits (bits D7 and D5 of the first command byte respectively) should always be set to "0".  
This command terminates when the EOT specified number of sectors has not been read. If the FDC does not find an ID  
Address Mark on the diskette after the second occurrence of a pulse on the nINDEX pin, then it sets the IC code in  
Status Register 0 to "01" (abnormal termination), sets the MA bit in Status Register 1 to "1", and terminates the  
command.  
SMSC LPC47B27x  
- 46 -  
Rev. 08-10-04  
DATASHEET  
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