USB 2.0 Hub and 10/100 Ethernet Controller
Datasheet
4.5.3
EEPROM Timing
The following specifies the EEPROM timing requirements for LAN9514/LAN9514i:
tcsl
EECS
tckcyc
tcklcsl
tckh
tckl
tcshckh
EECLK
tckldis
tdvckh tckhdis
EEDO
EEDI
tdsckh
tdhckh
tdhcsl
tcshdv
EEDI (VERIFY)
Figure 4.1 EEPROM Timing
Table 4.5 EEPROM Timing Values
SYMBOL
DESCRIPTION
EECLK Cycle time
MIN
TYP
MAX
UNITS
tckcyc
tckh
1110
550
550
1070
30
1130
570
570
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
EECLK High time
EECLK Low time
tckl
EECS high before rising edge of EECLK
EECLK falling edge to EECS low
EEDO valid before rising edge of EECLK
EEDO disable after rising edge EECLK
EEDI setup to rising edge of EECLK
EEDI hold after rising edge of EECLK
EECLK low to data disable (OUTPUT)
EEDIO valid after EECS high (VERIFY)
EEDIO hold after EECS low (VERIFY)
EECS low
tcshckh
tcklcsl
tdvckh
tckhdis
tdsckh
tdhckh
tckldis
tcshdv
tdhcsl
tcsl
550
550
90
0
580
600
0
1070
Revision 1.0 (11-24-09)
SMSC LAN9514/LAN9514i
DATA4S4HEET
SMSC [ SMSC CORPORATION ]
