16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
Table 7.6 10BASE-T Transceiver Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Transmitter Peak Differential
Output Voltage
VOUT
2.2
2.5
2.8
V
Note 7.6
Receiver Differential Squelch
Threshold
VDS
300
420
585
mV
Note 7.6 Measured at the line side of the transformer, line replaced by 100Ω (+/- 1%) resistor.
7.5
Clock Circuit
The LAN9217 can accept either a 25MHz crystal (preferred) or a 25 MHz clock oscillator (±50 PPM)
input. The LAN9217 shares the 25MHz clock oscillator input (CLKIN) with the crystal input
XTAL1/CLKIN (pin 6).
The Input Clock Duty Cycle is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN9217
crystal input/output signals (XTAL1, XTAL2). See Table 7.7, "Crystal Specifications" for crystal
specifications.
Table 7.7 Crystal Specifications
Frequency Tolerance @ 25° C
Frequency Stability Over Temp
Operating Temp Range
Shunt Capacitance
±50 PPM
±50 PPM
0 to 70° C
7.0 pF
Load Capacitance
20 pF ~ Parallel
0.5 mW
Drive Level
Table 7.8 Recommended Crystals
Fox Electronics
FOXS/250F-20
Additionally, SMSC recommends a series resistor for the crystal circuit. Further details are provided in
SMSC Application Note AN10.7 - “Parallel Crystal Circuit Input Voltage Control” and in the LAN9217
Reference Schematic.
SMSC LAN9217
133
Revision 1.5 (07-18-06)
DATASHEET
SMSC [ SMSC CORPORATION ]
