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LAN9215I-MT 参数 Datasheet PDF下载

LAN9215I-MT图片预览
型号: LAN9215I-MT
PDF下载: 下载PDF文件 查看货源
内容描述: 高效的单芯片10/100以太网控制器与HP Auto-MDIX的和工业温度支持 [Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support]
分类和应用: 外围集成电路数据传输控制器局域网以太网局域网(LAN)标准时钟
文件页数/大小: 134 页 / 1602 K
品牌: SMSC [ SMSC CORPORATION ]
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Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support  
Datasheet  
5.3.23  
E2P_CMD – EEPROM Command Register  
Offset:  
B0h  
Size:  
32 bits  
This register is used to control the read and write operations with the Serial EEPROM.  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
31  
EPC Busy: When a 1 is written into this bit, the operation specified in the  
EPC command field is performed at the specified EEPROM address. This  
bit will remain set until the operation is complete. In the case of a read this  
means that the host can read valid data from the E2P data register. The  
E2P_CMD and E2P_DATA registers should not be modified until this bit is  
cleared. In the case where a write is attempted and an EEPROM is not  
present, the EPC Busy remains busy until the EPC Time-out occurs. At that  
time the busy bit is cleared.  
SC  
0
Note:  
EPC busy will be high immediately following power-up or reset.  
After the EEPROM controller has finished reading (or attempting to  
read) the MAC address from the EEPROM the EPC Busy bit is  
cleared.  
SMSC LAN9215I  
Revision 1.5 (07-18-06)  
DATA9S5HEET