High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.4.17
Buffer Manager Port 1 Egress Rate Priority Queue 2/3 Register (BM_EGRSS_RATE_12_13)
Register #:
1C10h
Size:
32 bits
This register, along with the Buffer Manager Configuration Register (BM_CFG), is used to configure
the egress rate pacing.
BITS
DESCRIPTION
TYPE
DEFAULT
31:26
25:13
RESERVED
RO
-
Egress Rate Port 1 Priority Queue 3
These bits specify the egress data rate for the Port 1 priority queue 3. The
rate is specified in time per byte. The time is this value plus 1 times 20nS.
R/W
00000h
12:0
Egress Rate Port 1 Priority Queue 2
These bits specify the egress data rate for the Port 1 priority queue 2. The
rate is specified in time per byte. The time is this value plus 1 times 20nS.
R/W
00000h
SMSC LAN9312
429
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
