High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
BITS
DESCRIPTION
TYPE
DEFAULT
17:16
Egress Port Type Port 2
These bits set the egress port type which determines the tagging/un-tagging
rules.
R/W
0b
BIT
VALUES
EGRESS PORT TYPE
00
Dumb
Packets from regular ports pass untouched. Special tagged packets from the
Host MAC port have their tagged stripped.
01
10
Access
Tagged packets (including special tagged packets from the Host MAC port)
have their tagged stripped.
Hybrid
Supports a mix of tagging, un-tagging and changing tags. See Section 6.5.6,
"Adding, Removing, and Changing VLAN Tags," on page 79 for additional
details.
11
CPU
A special tag is added to indicate the source of the packet. See Section 6.5.6,
"Adding, Removing, and Changing VLAN Tags," on page 79 for additional
details.
15:14
13
RESERVED
RO
-
Insert Tag Port 1
Identical to Insert Tag Port 2 definition above.
R/W
0b
12
11
Change VLAN ID Port 1
R/W
R/W
R/W
R/W
0b
0b
0b
0b
Identical to Change VLAN ID Port 2 definition above.
Change Priority Port 1
Identical to Change Priority Port 2 definition above.
10
9:8
Change Tag Port 1
Identical to Change Tag Port 2 definition above.
Egress Port Type Port 1
Identical to Egress Port Type Port 2 definition above.
7:6
5
RESERVED
RO
-
Insert Tag Port 0(Host MAC)
Identical to Insert Tag Port 2 definition above.
R/W
0b
4
3
Change VLAN ID Port 0(Host MAC)
R/W
R/W
R/W
R/W
0b
0b
0b
0b
Identical to Change VLAN ID Port 2 definition above.
Change Priority Port 0(Host MAC)
Identical to Change Priority Port 2 definition above.
2
Change Tag Port 0(Host MAC)
Identical to Change Tag Port 2 definition above.
1:0
Egress Port Type Port 0(Host MAC)
Identical to Egress Port Type Port 2 definition above.
SMSC LAN9312
425
Revision 1.2 (04-08-08)
DATASHEET