High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Table 14.12 Indirectly Accessible Switch Control and Status Registers (continued)
REGISTER #
SYMBOL
REGISTER NAME
1849h
184Ah
SWE_ADMT_N_MEMBER
SWE_INGRESS_RATE_CFG
Switch Engine Admit Non Member Register, Section 14.5.3.24
Switch Engine Ingress Rate Configuration Register,
Section 14.5.3.25
SWE_INGRESS_RATE_CMD
SWE_INGRESS_RATE_CMD_STS
SWE_INGRESS_RATE_WR_DATA
SWE_INGRESS_RATE_RD_DATA
184Bh
184Ch
184Dh
184Eh
Switch Engine Ingress Rate Command Register,
Section 14.5.3.26
Switch Engine Ingress Rate Command Status Register,
Section 14.5.3.27
Switch Engine Ingress Rate Write Data Register,
Section 14.5.3.28
Switch Engine Ingress Rate Read Data Register,
Section 14.5.3.29
184Fh
1850h
RESERVED
Reserved for Future Use
SWE_FILTERED_CNT_MII
Switch Engine Port 0 Ingress Filtered Count Register,
Section 14.5.3.30
1851h
1852h
SWE_FILTERED_CNT_1
SWE_FILTERED_CNT_2
Switch Engine Port 1 Ingress Filtered Count Register,
Section 14.5.3.31
Switch Engine Port 2 Ingress Filtered Count Register,
Section 14.5.3.32
1853h-1854h
1855h
RESERVED
Reserved for Future Use
SWE_INGRESS_REGEN_TBL_MII
Switch Engine Port 0 Ingress VLAN Priority Regeneration
Register, Section 14.5.3.33
SWE_INGRESS_REGEN_TBL_1
SWE_INGRESS_REGEN_TBL_2
SWE_LRN_DISCRD_CNT_MII
SWE_LRN_DISCRD_CNT_1
SWE_LRN_DISCRD_CNT_2
1856h
1857h
1858h
1859h
185Ah
Switch Engine Port 1 Ingress VLAN Priority Regeneration
Register, Section 14.5.3.34
Switch Engine Port 2 Ingress VLAN Priority Regeneration
Register, Section 14.5.3.35
Switch Engine Port 0 Learn Discard Count Register,
Section 14.5.3.36
Switch Engine Port 1 Learn Discard Count Register,
Section 14.5.3.37
Switch Engine Port 2 Learn Discard Count Register,
Section 14.5.3.38
185Bh-187Fh
1880h
RESERVED
SWE_IMR
SWE_IPR
Reserved for Future Use
Switch Engine Interrupt Mask Register, Section 14.5.3.39
Switch Engine Interrupt Pending Register, Section 14.5.3.40
Reserved for Future Use
1881h
1882h-1BFFh
RESERVED
Buffer Manager (BM) CSRs
1C00h
1C01h
1C02h
BM_CFG
Buffer Manager Configuration Register, Section 14.5.4.1
Buffer Manager Drop Level Register, Section 14.5.4.2
BM_DROP_LVL
BM_FC_PAUSE_LVL
Buffer Manager Flow Control Pause Level Register,
Section 14.5.4.3
Revision 1.2 (04-08-08)
316
SMSC LAN9312
DATASHEET
SMSC [ SMSC CORPORATION ]
