High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.3.4
Host MAC Multicast Hash Table High Register (HMAC_HASHH)
Offset:
4h
Size:
32 bits
The 64-bit Multicast table is used for group address filtering. For hash filtering, the contents of the
destination address in the incoming frame is used to index the contents of the Hash table. The most
significant bit determines the register to be used (Hi/Low), while the other five bits determine the bit
within the register. A value of 00000 selects Bit 0 of the Multicast Hash Table Lo register and a value
of 11111 selects the Bit 31 of the Multicast Hash Table Hi register.
If the corresponding bit is 1, then the multicast frame is accepted. Otherwise, it is rejected. If the “Pass All
Multicast” (MCPAS) bit of the Host MAC Control Register (HMAC_CR) is set, then all multicast frames are
accepted regardless of the multicast hash values.
The Multicast Hash Table High register contains the higher 32 bits of the hash table and the Multicast
Hash Table Low register contains the lower 32 bits of the hash table. Refer to Section 9.4, "Address
Filtering," on page 114 for more information on address filtering.
This table determines if the Host MAC accepts the packets from the switch fabric. The switch fabric
address table and configuration determine the packets that get sent to the Host MAC.
BITS
DESCRIPTION
Upper 32-bits of the 64-bit Hash Table
TYPE
DEFAULT
31:0
R/W
00000000h
Revision 1.2 (04-08-08)
276
SMSC LAN9312
DATASHEET
SMSC [ SMSC CORPORATION ]
