High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.2.5.14 1588 Clock Low-DWORD Register (1588_CLOCK_LO)
Offset:
174h
Size:
32 bits
This read/write register combined with 1588 Clock High-DWORD Register (1588_CLOCK_HI) form the
64-bit 1588 Clock value. The 1588 Clock value is used for all 1588 timestamping. The 1588 Clock has
a base frequency of 100MHz, which can be adjusted via the 1588 Clock Addend Register
(1588_CLOCK_ADDEND) accordingly. Refer to Chapter 11, "IEEE 1588 Hardware Time Stamp Unit,"
on page 154 for additional information.
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
Clock Low (CLOCK_LO)
This field contains the low 32-bits of the 64-bit 1588 Clock.
R/W
00000000h
Note: Both this register and the 1588 Clock High-DWORD Register (1588_CLOCK_HI) must be
written for either to be affected.
Note: The value read is the saved value of the 1588 Clock when the 1588_CLOCK_SNAPSHOT bit
in the 1588 Command Register (1588_CMD) is set.
Revision 1.2 (04-08-08)
214
SMSC LAN9312
DATASHEET
SMSC [ SMSC CORPORATION ]
