High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
11.1.2
Block Diagram
The LAN9312 IEEE 1588 implementation is illustrated in Figure 11.1, and consists of the following
major function blocks:
IEEE 1588 Time Stamp
These three identical blocks provide time stamping functions on all switch fabric ports.
IEEE 1588 Clock
This block provides a 64-bit tunable clock that is used as the time source for all IEEE 1588 time
stamp related functions.
IEEE 1588 Clock/Events
This block provides IEEE 1588 clock comparison-based interrupt generation and time stamp related
GPIO event generation.
IEEE 1588
IEEE 1588
Time Stamp
Time Stamp
MII
MII
Ethernet
Ethernet
10/100
PHY
To Host MAC
Switch Fabric
MII
10/100
PHY
IEEE 1588 Time Stamp
Clock Capture RX
IEEE 1588 Clock
RX
32 Bit Addend
Src UUID Capture RX
Sequence ID Capture RX
IRQ Flag
+
32 Bit Accumulator
inc
Sync / Delay_Req
Msg Detect RX
carry
RX: Delay_Req for Master, Sync for Slave
host
64 Bit Clock
TX
Clock Capture TX
Src UUID Capture TX
Sequence ID Capture TX
IRQ Flag
Sync / Delay_Req
Msg Detect TX
host
TX: Sync for Master, Delay_Req for Slave
IEEE 1588 Clock Events
64 Bit Reload / Add
load / add
64 Bit Clock Target
compare >=
GPIO[8:9]
(Outputs)
IRQ Flag
Clock Capture GPIO8
IRQ Flag
GPIO[8:9]
(Inputs)
IRQ Flags
IRQ Enables
To INT_STS register
Clock Capture GPIO9
IRQ Flag
X9
host
Figure 11.1 IEEE 1588 Block Diagram
SMSC LAN9312
155
Revision 1.2 (04-08-08)
DATASHEET