FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
CHIP ID VALUE
DEVICE
LAN91C90/LAN91C92
LAN91C94
3
4
5
4*
7
LAN91C95
LAN91C96
LAN91C100
8
9
LAN91C100FD
LAN91C110
*Note: Shares the chip ID with the LAN91C94. Distinction is made by the revision ID. Revision ID of 6 or
higher represents the LAN91C96.
OFFSET
C
NAME
EARLY RCV REGISTER
TYPE
READ/WRITE
SYMBOL
ERCV
HIGH
BYTE
0
0
0
0
1
0
1
0
0
0
1
LOW
RCV
Reserved
Reserved
ERCV THRESHOLD
BYTE
DISCRD
0
0
0
1
1
RCV DISCRD - Set to discard a packet being received. Will discard packets only in the process of being received. When
set prior to the end of receive packet, bit 4 (RXOVRN) of the interrupt status register will be set to indicate that the packet
was discarded. Otherwise, the packet will be received normally and bit 0 set (RCVINT) in the interrupt status register.
RCV DISCRD is self clearing.
ERCV THRESHOLD - Threshold for ERCV interrupt. Specified in 64 byte multiples.
Whenever the number of bytes written in memory for the presently received packet exceeds the ERCV THRESHOLD,
ERCV INT bit of the INTERRUPT STATUS REGISTER is set.
BANK7
OFFSET
0 THROUGH 7
NAME
EXTERNAL REGISTERS
TYPE
SYMBOL
nCSOUT is driven low by the LAN91C110 when a valid access to the EXTERNAL REGISTER range occurs.
HIGH
BYTE
EXTERNAL R/W REGISTER
EXTERNAL R/W REGISTER
LOW
BYTE
SMSC DS – LAN91C110 REV. B
Page 34
Rev. 09/05/02
SMSC [ SMSC CORPORATION ]
