Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
t3
t10
t2
nAS (nAEN)
t4
t6
ADD
t5
t7
xDS,LDS,UDS (nIORD)
R/nW (nIOWR)
t1
t9
t8
DATA
Figure 12.11 - 68000 Write Timing
MIN
0
30
15
10
15
0
15
10
10
60
TYP
MAX
UNIT
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
COMMENTS
R/nW assertion before nAS
nAS assertion time
Address setup time
Address hold time
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
nAS to xDS
xDS deassertion delay to nAS deassertion
xDS assertion time
Data setup time
Data hold time
Cycle time
SMSC DS – LAN91C965v&3v
Page 109
Rev. 09/10/2004
DATASHEET