Non-PCI Single-Chip Full Duplex Ethernet Controller
I/O SPACE - BANK2
OFFSET
NAME
PACKET NUMBER REGISTER
TYPE
READ/WRITE
SYMBOL
PNR
2
RESERVED
0
PACKET NUMBER AT TX AREA
0
0
0
0
0
0
0
PACKET NUMBER AT TX AREA - The value written into this register determines which packet number is
accessible through the TX area. Some MMU commands use the number stored in this register as the
packet number parameter. This register is cleared by a RESET or a RESET MMU Command.
RESERVED – This bit is reserved.
I/O SPACE - BANK2
OFFSET
3
NAME
TYPE
READ ONLY
SYMBOL
ARR
ALLOCATION RESULT REGISTER
This register is updated upon an ALLOCATE MEMORY MMU command.
FAILED
1
ALLOCATED PACKET NUMBER
0
0
0
0
0
0
0
FAILED - A ”0” indicates a successful allocation completion. If the allocation fails the bit is set and only
cleared when the pending allocation is satisfied. Defaults high upon reset and reset MMU command. For
polling purposes, the ALLOC_INT in the Interrupt Status Register should be used because it is
synchronized to the read operation.
Sequence:
1. Allocate Command
2. Poll ALLOC_INT bit until set
3. Read Allocation Result Register
ALLOCATED PACKET NUMBER - Packet number associated with the last memory allocation request.
The value is only valid if the FAILED bit is clear.
Note:
For software compatibility with future versions, the value read from the ARR after an allocation request is
intended to be written into the PNR as is, without masking higher bits (provided FAILED = “0”).
SMSC DS – LAN91C96I
Page 49
Rev. 11/18/2004
DATASHEET
SMSC [ SMSC CORPORATION ]
