Non-PCI Single-Chip Full Duplex Ethernet Controller
LAN91C96I Datasheet Revision History
DATE
REVISED
11/18/04
PAGE(S) SECTION/FIGURE/ENTRY
CORRECTION
2
2
Ordering Information
Lead-free ordering information modified
Added lead-free ordering information
Ordering Information
09/10/04
12/18/03
86
11.2 DC Electrical Characteristics
Modified Supply Current to power down
mode current
59
Chapter 8 Theory of Operation
8.6 Power Down
Modified descriptions of “Magic Packet
12/18/03
Support”
71
10
Modified description of under heading.
12/18/03
10/31/03
Figure 3.1 – Pin Configuration of
LAN91C96I QFP
Modified pin number 95
(removed nPCMCIA)
11
42
Modified pin number 93
10/31/03
Figure 3.2 − Pin Configuration of
LAN91C96I TQFP
(removed nPCMCIA)
I/O Space – Bank1 Offset 2
Modified I/O base address 300h decoding
10/07/02
09/18/02
109, 110 Figure 13.1 - 100 Pin QFP Package, New pin package diagrams
Figure 13.2 - 100 Pin TQFP
Package
15
Chapter 4 - Description of Pin
Add description of RBIAS pin
08/01/02
Functions
50
55
IO Space Bank 2 Offset 2 – Interrupt Modified description of Interrupt Registers
08/01/02
08/01/02
Figure 7.2 – Interrupt Structure
Modified Interrupt Structure Figure
59
61
Bank 3 Offset A – Revision Register
Changed the REV ID to 9
08/01/02
08/01/02
8.1, 8.2 Typical Flow of Events for
Transmit
Title and document
Modified Flow Chart
1
Non-PCI replaces ISA in title. Local Bus
replaces ISA throughout document.
Figure has been updated.
04/15/02
04/15/02
64
Figure 8.1 – Interrupt Service
Routine
30
30
Figure 6.1 – Data Packet Format
Data area in ram
Changed Max Offset To 1534 From 1536
07/26/01
07/26/01
Number of Bytes in Data Area Changed to
1531 from 2034
25
86
67
Figure 5.4 – LAN91C96i Internal
Block Diagram with Data Path
DC Electrical Characteristics
Modify figure
07/26/01
07/26/01
03/21/01
Update 3.3V Characteristics numbers to
replace TBD
Updated figure
Figure 8.4 – TXEMPTY INTR
SMSC DS – LAN91C96I
Page 3
Rev. 11/18/2004
DATASHEET
SMSC [ SMSC CORPORATION ]
