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LAN91C96I-MS 参数 Datasheet PDF下载

LAN91C96I-MS图片预览
型号: LAN91C96I-MS
PDF下载: 下载PDF文件 查看货源
内容描述: 非PCI单芯片全双对象以太网控制器 [NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER]
分类和应用: 控制器PC以太网以太网:16GBASE-T
文件页数/大小: 110 页 / 654 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号LAN91C96I-MS的Datasheet PDF文件第13页浏览型号LAN91C96I-MS的Datasheet PDF文件第14页浏览型号LAN91C96I-MS的Datasheet PDF文件第15页浏览型号LAN91C96I-MS的Datasheet PDF文件第16页浏览型号LAN91C96I-MS的Datasheet PDF文件第18页浏览型号LAN91C96I-MS的Datasheet PDF文件第19页浏览型号LAN91C96I-MS的Datasheet PDF文件第20页浏览型号LAN91C96I-MS的Datasheet PDF文件第21页  
Non-PCI Single-Chip Full Duplex Ethernet Controller  
PIN NO.  
TQFP  
QFP  
PIN NAME  
TYPE  
DESCRIPTION  
1
3
ENEEP  
I with  
Input. This active high input enables the EEPROM to be read  
or written by the LAN91C96I. Internally pulled up. Must be  
connected to ground if no serial EEPROM is used.  
pullup  
**  
91  
93  
nEN16  
I with  
Input. When low the LAN91C96I is configured for 16 bit bus  
operation. If left open the LAN91C96I works in 8 bit bus  
mode. 16 bit configuration can also be programmed via serial  
EEPROM or software initialization of the CONFIGURATION  
REGISTER.  
pullup  
**  
94  
95  
96  
97  
XTAL1  
XTAL2  
Iclk  
**  
An external parallel resonance 20MHz crystal should be  
connected across these pins. If an external clock source is  
used, it should be connected to this pin (XTAL1) and XTAL2  
should be left open.  
An external parallel resonance 20MHz crystal should be  
connected across these pins. If an external clock source is  
used, it should be connected to XTAL1 and this pin (XTAL2)  
should be left open.  
Iclk  
83  
82  
85  
84  
RECP/  
RECN  
Diff.  
AUI receive differential inputs.  
Input  
**  
77  
76  
79  
78  
TXP/nCOLL  
TXN/nCRS  
Diff.  
Output  
INTERNAL ENDEC - (nXENDEC pin open). In this mode  
TXP and TXN are the AUI transmit differential outputs. They  
must be externally pulled up using 150 ohm resistors.  
I
**  
EXTERNAL ENDEC - (nXENDEC pin tied low). In this mode  
the pins are inputs used for collision and carrier sense  
functions.  
81  
80  
83  
82  
COLP  
COLN  
Diff.  
Input  
**  
AUI collision differential inputs. A collision is indicated by a  
10MHz signal at this input pair.  
85  
84  
87  
86  
TPERXP  
TPERXN  
Diff.  
Input  
**  
10BASE-T receive differential inputs.  
75  
73  
72  
74  
77  
75  
74  
76  
TPETXP  
TPETXN  
TPETXDP  
TPETXDN  
Diff.  
Output  
Diff.  
Output  
INTERNAL ENDEC - 10BASE-T transmit differential outputs.  
10BASE-T delayed transmit differential outputs. Used in  
combination with TPETXP and TPETXN to generate the  
10BASE-T transmit pre-distortion.  
66  
68  
PWRDWN/  
TXCLK  
I with  
INTERNAL ENDEC - Powerdown input. It keeps the  
LAN91C96I in powerdown mode when high (open). Must be  
low for normal operation.  
pullup  
**  
EXTERNAL ENDEC - Transmit clock input from external  
ENDEC.  
88  
90  
90  
92  
RBIAS  
Analog  
Input  
A resistor should be connected between this pin and analog  
ground to determine the threshold level of the TP Receive,  
AUI Receive, AUI Collision and AUI Transmit level.  
When tied low the LAN91C96I is configured for EXTERNAL  
ENDEC. When tied high or left open the LAN91C96I will use  
its internal encoder/decoder.  
nXENDEC  
I with  
pullup  
**  
11,19,  
48,59,  
98,38  
13,21,40, VDD  
+5.0V power supply pins or 3.3V power supply pins  
50,  
61,100  
SMSC DS – LAN91C96I  
Page 17  
Rev. 11/18/2004  
DATASHEET  
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