10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Table 14.4 Link Pulse Timing Characteristics
LIMIT
MIN
UNIT
CONDITIONS
SYM
PARAMETER
TYP MAX
t42
t43
t44
NLP Transmit Link Pulse Width
NLP Transmit Link Pulse Period
See Figure 7.8
nS
mS
nS
8
24
NLP Receive Link Pulse Width Required
For Detection
50
t45
t46
t47
NLP Receive Link Pulse Minimum Period
Required For Detection
6
7
mS
mS
link_test_min
link_test_max
lc_max
NLP Receive Link Pulse Maximum
Period Required For Detection
50
150
3
NLP Receive Link Pulse Required To
Exit Link Fail State
3
3
Link
Pulses
t48
t49
FLP Transmit Link Pulse Width
100
150
nS
FLP Transmit Clock Pulse to Data Pulse
Period
55.5
62.5 69.5
µS
interval_timer
t50
t51
t52
t53
t54
FLP Transmit Clock Pulse to Clock Pulse
Period
111
8
125
139
22
µS
mS
nS
µS
µS
FLP Transmit Link Pulse Burst Period
transmit_link_burst_time
r
FLP Receive Link Pulse Width Required
For Detection
50
5
FLP Receive Link Pulse Minimum Period
Required For Clock Pulse Detection
25
flp_test_min_timer
flp_test_max_timer
FLP Receive Link Pulse Maximum
Period Required For Clock Pulse
Detection
165
185
t55
t56
FLP Receive Link Pulse Minimum Period
Required For Data Pulse Detection
15
78
47
µS
µS
data_detect_min_timer
data_detect_max_timer
FLP Receive Link Pulse Maximum
Period Required For Data Pulse
Detection
100
t57
t58
t59
FLP Receive Link Pulse Burst Minimum
Period Required For Detection
5
7
mS
mS
nlp_test_min_timer
nlp_test_max_timer
FLP Receive Link Pulse Burst Maximum
Period Required For Detection
50
3
150
3
FLP Receive Link Pulses Bursts
Required To Detect AutoNegotiation
Capability
3
Link
Pulses
Revision 1.8 (07-13-05)
138
SMSC LAN91C111-REV B
DATASHEET
SMSC [ SMSC CORPORATION ]
