10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
VLBUS
W/nR
W/nR
A2-A15
LCLK
A2-A15
LCLK
M/nIO
AEN
nRESET
RESET
INTR0
LAN91C111
IRQn
D0-D31
nRDYRTN
nBE0-nBE3
D0-D31
nRDYRTN
nBE0-nBE3
nADS
nADS
Delay 1 LCLK
nCYCLE
nSRDY
nLDEV
O.C.
nLRDY
simulated
O.C.
nLDEV
Figure 12.1 LAN91C111 on VL BUS
HIGH-END ISA OR NON-BURST EISA MACHINES
On ISA machines, the LAN91C111 is accessed as a 16 bit peripheral. The signal connections are listed
in the following table:
Table 12.2 High-End ISA or Non-Burst EISA Machines Signal Connectors
ISA BUS
SIGNAL
LAN91C111
NOTES
SIGNAL
A1-A15
AEN
A1-A15
AEN
Address bus used for I/O space and register decoding.
Qualifies valid I/O decoding - enabled access when low.
nIORD
nRD
I/O Read strobe - asynchronous read accesses. Address is valid before
leading edge.
SMSC LAN91C111-REV B
113
Revision 1.8 (07-13-05)
DATASHEET
SMSC [ SMSC CORPORATION ]
