LAN9118
High-Performance
Single-Chip 10/100
Non-PCI Ethernet
Controller
PRODUCT FEATURES
Highlights
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Data Brief
— Low-cost, low-pin count non-PCI interface for
embedded designs
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Optimized for high-data rate applications such as
video, high-definition video and multi-media
applications
Efficient architecture with low CPU overhead; easily
interfaces to most Embedded CPU’s
Reduces system and design costs
Architected for Low Power
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Numerous power management modes
Wake on LAN
Magic packet wakeup
Wakeup indicator event signal
Link Status Change
Fully compliant with IEEE 802.3/802.3u standards
Integrated Ethernet MAC and PHY
10BASE-T and 100BASE-TX support
Full- and Half-duplex support
Full-duplex flow control
Backpressure for half-duplex flow control
Preamble generation and removal
Automatic 32-bit CRC generation and checking
Automatic payload padding and pad removal
Loop-back modes
One 48-bit perfect address
64 hash-filtered multicast addresses
Pass all multicast
Promiscuous mode
Inverse filtering
Pass all incoming with status report
Disable reception of broadcast packets
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Single chip Ethernet controller
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Target Applications
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Cable, satellite, and IP set-top boxes
Digital video recorders
High definition televisions
Digital music jukeboxes
Digital media clients/servers
DVD recorders/players
Home gateways
Video-over IP Solutions
Wireless routers & access points
IP PBX & video phones
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Flexible address filtering modes
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Key Benefits
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Integrated Ethernet PHY
— Auto-negotiation
— Automatic polarity detection and correction
Supports high and ultra-high performance
applications
— Highest performing non-PCI Ethernet controller in the
market
— 32-bit interface with 45ns bus cycle times
— Burst-mode read support
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High-Performance host bus interface
— Simple, SRAM-like interface
— 32/16-bit data bus
— Large, 16Kbyte FIFO memory that can be allocated to
RX or TX functions
— One configurable Host interrupt
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Eliminates dropped packets
— Internal SRAM can store over 200 packets
— Supports automatic or host-triggered PAUSE and back-
pressure flow control
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Miscellaneous features
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Low profile 100-pin TQFP package
Integral 1.8V regulator
General Purpose Timer
Support for optional EEPROM
Support for 3 status LEDs multiplexed with
Programmable GPIO signals
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Minimizes CPU overhead
— Supports Slave-DMA
— Interrupt Pin with Programmable Hold-off timer
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Reduces system cost and increases design flexibility
— SRAM-like interface easily interfaces to most
Embedded CPU’s or SoC’s
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3.3V Power Supply with 5V tolerant I/O
0 to 70°C
Revision 0.5 (09-09-04)
SMSC LAN9118
PRODUCT PREVIEW
SMSC [ SMSC CORPORATION ]
