Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
BITS
DESCRIPTION
RESERVED
TYPE
DEFAULT
31:14
13-12
RO
SC
-
Power Management Mode (PM_MODE) – These bits set the LAN9116 into
the appropriate Power Management mode. Special care must be taken when
modifying these bits.
00b
Encoding:
00b – D0 (normal operation)
01b – D1 (wake-up frame and magic packet detection are enabled)
10b – D2 (can perform energy detect)
11b – RESERVED - Do not set in this mode
Note:
When the LAN9116 is in a any of the reduced power modes, a write
of any data to the BYTE_TEST register will wake-up the device. DO
NOT PERFORM WRITES TO OTHER ADDRRESSES while the
READY bit in this register is cleared.
11
10
RESERVED
RO
SC
-
PHY Reset (PHY_RST) – Writing a ‘1’ to this bit resets the PHY. The internal
logic automatically holds the PHY reset for a minimum of 100us. When the
PHY is released from reset, this bit is automatically cleared. All writes to this
bit are ignored while this bit is high.
0b
9
8
Wake-On-Lan Enable (WOL_EN) – When set, the PME signal (if enabled
with PME_EN) will be asserted in accordance with the PME_IND bit upon a
WOL event. When set, the PME_INT will also be asserted upon a WOL
event, regardless of the setting of the PME_EN bit.
R/W
R/W
RO
0b
0b
Energy-Detect Enable (ED_EN) - When set, the PME signal (if enabled with
PME_EN) will be asserted in accordance with the PME_IND bit upon an
Energy-Detect event. When set, the PME_INT will also be asserted upon an
Energy Detect event, regardless of the setting of the PME_EN bit.
7
6
RESERVED
-
PME Buffer Type (PME_TYPE) – When cleared, enables PME to function
as an open-drain buffer for use in a Wired-Or configuration. When set, the
PME output is a Push-Pull driver. When configured as an open-drain output
the PME_POL field is ignored, and the output is always active low.
R/W
0b
NASR
5-4
WAKE-UP Status (WUPS) – This field indicates the cause of a wake-up
R/WC
00
event detection as follows
00b -- No wake-up event detected
01b -- Energy detected
10b -- Wake-up frame or magic packet detected
11b -- Indicates multiple events occurred
WUPS bits are cleared by writing a ‘1’ to the appropriate bit. The device must
return to the D0 state (READY bit set) before these bits can be cleared.
Note:
In order to clear this bit, it is required that all event sources be
cleared as well. The event sources are decribed in Figure 3.11 PME
and PME_INT Signal Generationon page 39.
Revision 1.1 (05-17-05)
SMSC LAN9116
DATA8S0HEET
SMSC [ SMSC CORPORATION ]
