Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
4.7.1
REF_CLK In Mode
A 50MHz source of REF_CLK must be available external to the LAN8720 when using this mode. The
clock is driven to both the MAC and PHY as shown in Figure 4.4.
LAN8720
10/100 PHY
24-QFN
MAC
RMII
RMII
MDIO
MDC
nINT
Accepts external
50MHz clock
Mag
RJ45
TXD[1:0]
TXP
TXN
2
2
TXEN
RXP
RXN
RXD[1:0]
CRS_DV
RXER
REF_CLK
All RMII signals are
synchronous to the supplied
clock
XTAL1/CLKIN
XTAL2
LED[2:1]
nRST
2
Interface
50MHz
Reference
Clock
Figure 4.4 External 50MHz clock sources the REF_CLK
4.7.2
REF_CLK OUT Mode
To reduce BOM cost, the LAN8720 includes a feature to generate the RMII REF_CLK signal from a
low-cost, 25MHz, fundamental crystal. This type of crystal is inexpensive in comparison to 3rd overtone
crystals that would normally be required for 50MHz. The MAC must be capable of operating with an
external clock to take advantage of this feature as shown in Figure 4.5.
The LAN8720 is a small size, low pin count device. In order to optimize package size and cost, the
REFCLKO pin is multiplexed with the nINT pin. Therefore, in this specific mode of operation, the nINT
pin is disabled since REFCLKO is used to provide the 50MHz clock to the MAC.
SMSC LAN8720/LAN8720i
Revision 1.0 (05-28-09)
DATA2S7HEET