®
MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint
Datasheet
Table 5.34 Register 29 - Interrupt Source Flags (continued)
NAME DESCRIPTION
ADDRESS
MODE DEFAULT
29.1
INT1
1 = Auto-Negotiation Page Received
0 = not source of interrupt
RO/
LH
X
0
29.0
Reserved
Ignore on read.
RO/
LH
Table 5.35 Register 30 - Interrupt Mask
ADDRESS
NAME
DESCRIPTION
MODE DEFAULT
30.15:8
30.7:1
Reserved
Mask Bits
Write as 0; ignore on read.
RO
0
0
1 = interrupt source is enabled
0 = interrupt source is masked
RW
30.0
Reserved
Write as 0; ignore on read
RO
0
Table 5.36 Register 31 - PHY Special Control/Status
ADDRESS
NAME
DESCRIPTION
MODE DEFAULT
31.15:13
31.12
Reserved
Autodone
Write as 0, ignore on read.
RW
RO
0
0
Auto-negotiation done indication:
0 = Auto-negotiation is not done or disabled (or not
active)
1 = Auto-negotiation is done
Note:
This is a duplicate of register 1.5, however
reads to register 31 do not clear status bits.
31.11:10
31.9:7
Reserved
GPO[2:0]
Write as 0, ignore on Read.
RW
RW
XX
0
General Purpose Output connected to signals
GPO[2:0]
31.6
Enable 4B5B
0 = Bypass encoder/decoder.
1 = enable 4B5B encoding/decoding.
MAC Interface must be configured in MII mode.
RW
1
31.5
Reserved
Write as 0, ignore on Read.
RW
RO
0
31.4:2
Speed Indication
HCDSPEED value:
XXX
[001]=10Mbps Half-duplex
[101]=10Mbps Full-duplex
[010]=100Base-TX Half-duplex
[110]=100Base-TX Full-duplex
31.1
31.0
Reserved
Write as 0; ignore on Read
RW
RW
0
0
Scramble Disable
0 = enable data scrambling
1 = disable data scrambling,
Revision 1.0 (04-15-09)
SMSC LAN8710/LAN8710i
DATA4S6HEET