欢迎访问ic37.com |
会员登录 免费注册
发布采购

LAN8710A-EZK 参数 Datasheet PDF下载

LAN8710A-EZK图片预览
型号: LAN8710A-EZK
PDF下载: 下载PDF文件 查看货源
内容描述: MII / RMII 10/100以太网收发器, HP Auto-MDIX的和flexPWR技术在小尺寸 [MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint]
分类和应用: 网络接口电信集成电路电信电路以太网局域网(LAN)标准以太网:16GBASE-T
文件页数/大小: 79 页 / 1095 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号LAN8710A-EZK的Datasheet PDF文件第26页浏览型号LAN8710A-EZK的Datasheet PDF文件第27页浏览型号LAN8710A-EZK的Datasheet PDF文件第28页浏览型号LAN8710A-EZK的Datasheet PDF文件第29页浏览型号LAN8710A-EZK的Datasheet PDF文件第31页浏览型号LAN8710A-EZK的Datasheet PDF文件第32页浏览型号LAN8710A-EZK的Datasheet PDF文件第33页浏览型号LAN8710A-EZK的Datasheet PDF文件第34页  
®
MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint  
Datasheet  
Writing register 4 bits [8:5] allows software control of the capabilities advertised by the transceiver.  
Writing register 4 does not automatically re-start auto-negotiation. Register 0, bit 9 must be set before  
the new abilities will be advertised. Auto-negotiation can also be disabled via software by clearing  
register 0, bit 12.  
The LAN8710/LAN8710i does not support “Next Page” capability.  
4.7.1  
Parallel Detection  
If the LAN8710/LAN8710i is connected to a device lacking the ability to auto-negotiate (i.e. no FLPs  
are detected), it is able to determine the speed of the link based on either 100M MLT-3 symbols or  
10M Normal Link Pulses. In this case the link is presumed to be Half Duplex per the IEEE standard.  
This ability is known as “Parallel Detection.” This feature ensures interoperability with legacy link  
partners. If a link is formed via parallel detection, then bit 0 in register 6 is cleared to indicate that the  
Link Partner is not capable of auto-negotiation. The controller has access to this information via the  
management interface. If a fault occurs during parallel detection, bit 4 of register 6 is set.  
Register 5 is used to store the Link Partner Ability information, which is coded in the received FLPs.  
If the Link Partner is not auto-negotiation capable, then register 5 is updated after completion of parallel  
detection to reflect the speed capability of the Link Partner.  
4.7.2  
Re-starting Auto-negotiation  
Auto-negotiation can be re-started at any time by setting register 0, bit 9. Auto-negotiation will also re-  
start if the link is broken at any time. A broken link is caused by signal loss. This may occur because  
of a cable break, or because of an interruption in the signal transmitted by the Link Partner. Auto-  
negotiation resumes in an attempt to determine the new link configuration.  
If the management entity re-starts Auto-negotiation by writing to bit 9 of the control register, the  
LAN8710/LAN8710i will respond by stopping all transmission/receiving operations. Once the  
break_link_timer is done, in the Auto-negotiation state-machine (approximately 1200ms) the auto-  
negotiation will re-start. The Link Partner will have also dropped the link due to lack of a received  
signal, so it too will resume auto-negotiation.  
4.7.3  
4.7.4  
Disabling Auto-negotiation  
Auto-negotiation can be disabled by setting register 0, bit 12 to zero. The device will then force its  
speed of operation to reflect the information in register 0, bit 13 (speed) and register 0, bit 8 (duplex).  
The speed and duplex bits in register 0 should be ignored when auto-negotiation is enabled.  
Half vs. Full Duplex  
Half Duplex operation relies on the CSMA/CD (Carrier Sense Multiple Access / Collision Detect)  
protocol to handle network traffic and collisions. In this mode, the carrier sense signal, CRS, responds  
to both transmit and receive activity. In this mode, If data is received while the transceiver is  
transmitting, a collision results.  
In Full Duplex mode, the transceiver is able to transmit and receive data simultaneously. In this mode,  
CRS responds only to receive activity. The CSMA/CD protocol does not apply and collision detection  
is disabled.  
4.8  
HP Auto-MDIX Support  
HP Auto-MDIX facilitates the use of CAT-3 (10 Base-T) or CAT-5 (100 Base-T) media UTP interconnect  
cable without consideration of interface wiring scheme. If a user plugs in either a direct connect LAN  
cable, or a cross-over patch cable, as shown in Figure 4.4, the SMSC LAN8710/LAN8710i Auto-MDIX  
transceiver is capable of configuring the TXP/TXN and RXP/RXN pins for correct transceiver operation.  
Revision 1.0 (04-15-09)  
SMSC LAN8710/LAN8710i  
DATA3S0HEET