Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
5.5.4.2
RMII Timing (REF_CLK In Mode)
The 50MHz REF_CLK IN timing applies to the case when nINTSEL is floated or pulled-high. In this
mode, a 50MHz clock must be input on the CLKIN pin. For more information on REF_CLK In Mode,
see Section 3.7.4.1, "REF_CLK In Mode," on page 34.
tclkp
tclkh tclkl
CLKIN
(REF_CLK)
toval
toval
tohold
RXD[1:0],
RXER
tohold
toval
CRS_DV
TXD[1:0]
TXEN
tsu tihold
tsu tihold
tihold
tihold
tsu
Figure 5.5 RMII Timing (REF_CLK In Mode)
Table 5.10 RMII Timing Values (REF_CLK In Mode)
SYMBOL
DESCRIPTION
MIN
MAX
UNITS
NOTES
tclkp
tclkh
tclkl
CLKIN period
20
ns
ns
ns
ns
CLKIN high time
CLKIN low time
tclkp*0.35
tclkp*0.35
tclkp*0.65
tclkp*0.65
14.0
toval
RXD[1:0], RXER, CRS_DV output valid from
rising edge of CLKIN
Note 5.17
Note 5.17
Note 5.17
Note 5.17
tohold
tsu
RXD[1:0], RXER, CRS_DV output hold from
rising edge of CLKIN
3.0
4.0
1.5
ns
ns
ns
TXD[1:0], TXEN setup time to rising edge of
CLKIN
tihold
TXD[1:0], TXEN input hold time after rising edge
of CLKIN
Note 5.17 Timing was designed for system load between 10 pf and 25 pf.
Revision 1.4 (08-23-12)
72
SMSC LAN8720A/LAN8720Ai
DATASHEET
SMSC [ SMSC CORPORATION ]
