Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
5.5.4
RMII Interface Timing
5.5.4.1
RMII Timing (REF_CLK Out Mode)
The 50MHz REF_CLK OUT timing applies to the case when nINTSEL is pulled-low. In this mode, a
25MHz crystal or clock oscillator must be input on the XTAL1/CLKIN and XTAL2 pins. For more
information on REF_CLK Out Mode, see Section 3.7.4.2, "REF_CLK Out Mode," on page 34.
tclkp
tclkh tclkl
REFCLKO
toval
toval
tohold
RXD[1:0],
RXER
tohold
toval
CRS_DV
TXD[1:0]
TXEN
tsu tihold
tsu tihold
tihold
tihold
tsu
Figure 5.4 RMII Timing (REF_CLK Out Mode)
Table 5.9 RMII Timing Values (REF_CLK Out Mode)
SYMBOL
DESCRIPTION
REFCLKO period
MIN
MAX
UNITS
NOTES
tclkp
tclkh
tclkl
20
ns
ns
ns
ns
REFCLKO high time
REFCLKO low time
tclkp*0.4
tclkp*0.4
tclkp*0.6
tclkp*0.6
5.0
toval
RXD[1:0], RXER, CRS_DV output valid from
rising edge of REFCLKO
Note 5.16
Note 5.16
Note 5.16
Note 5.16
tohold
tsu
RXD[1:0], RXER, CRS_DV output hold from
rising edge of REFCLKO
1.4
7.0
2.0
ns
ns
ns
TXD[1:0], TXEN setup time to rising edge of
REFCLKO
tihold
TXD[1:0], TXEN input hold time after rising edge
of REFCLKO
Note 5.16 Timing was designed for system load between 10 pf and 25 pf.
SMSC LAN8720A/LAN8720Ai
71
Revision 1.4 (08-23-12)
DATASHEET
SMSC [ SMSC CORPORATION ]
