Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR
®
Technology
Datasheet
Chapter 2 Pin Description and Configuration
nINT/TXER/TXD4
18
TXCLK
TXEN
nRST
TXD2
TXD1
TXD0
24
23
22
21
20
19
TXD3
RXDV
VDD1A
TXN
TXP
RXN
RXP
RBIAS
17
MDC
25
26
27
28
16
MDIO
COL/CRS_DV/MODE2
CRS
RXER/RXD4/PHYAD0
VDDIO
RXD0/MODE0
RXD1/MODE1
RXD2/RMIISEL
SMSC
LAN8710A/LAN8710Ai
32 PIN QFN
(TOP VIEW)
15
14
13
VSS
29
30
31
32
12
11
10
9
1
2
3
4
5
6
7
RXCLK/PHYAD1
NOTE:
Exposed pad (VSS) on bottom of package must be connected to ground
Figure 2.1 32-QFN Pin Assignments (TOP VIEW)
Note:
When a lower case “n” is used at the beginning of the signal name, it indicates that the signal
is active low. For example, nRST indicates that the reset signal is active low.
Note:
The buffer type for each signal is indicated in the BUFFER TYPE column. A description of the
buffer types is provided in
SMSC LAN8710A/LAN8710Ai
9
RXD3/PHYAD2
VDD2A
LED1/REGOFF
XTAL2
XTAL1/CLKIN
LED2/nINTSEL
VDDCR
8
Revision 1.4 (08-23-12)
DATASHEET