欢迎访问ic37.com |
会员登录 免费注册
发布采购

LAN8710AI 参数 Datasheet PDF下载

LAN8710AI图片预览
型号: LAN8710AI
PDF下载: 下载PDF文件 查看货源
内容描述: 小尺寸MII / RMII 10/100以太网收发器, HP Auto-MDIX的和flexPWR技术 [Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology]
分类和应用: 以太网局域网(LAN)标准
文件页数/大小: 82 页 / 1172 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号LAN8710AI的Datasheet PDF文件第8页浏览型号LAN8710AI的Datasheet PDF文件第9页浏览型号LAN8710AI的Datasheet PDF文件第10页浏览型号LAN8710AI的Datasheet PDF文件第11页浏览型号LAN8710AI的Datasheet PDF文件第13页浏览型号LAN8710AI的Datasheet PDF文件第14页浏览型号LAN8710AI的Datasheet PDF文件第15页浏览型号LAN8710AI的Datasheet PDF文件第16页  
®
Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology  
Datasheet  
Table 2.1 MII/RMII Signals (continued)  
BUFFER  
TYPE  
NUM PINS  
NAME  
SYMBOL  
DESCRIPTION  
Receive Error  
RXER  
VO8  
VO8  
This signal is asserted to indicate that an error  
was detected somewhere in the frame presently  
being transferred from the transceiver.  
Note:  
This signal is optional in RMII Mode.  
Receive  
Data 4  
(MII Mode)  
RXD4  
In Symbol Interface (5B Decoding) mode, this  
signal is the MII Receive Data 4 signal, the MSB  
of the received 5-bit symbol code-group.  
Note:  
Unless configured to the Symbol  
Interface mode, this pin functions as  
RXER.  
1
PHY Address  
0
Configuration  
Strap  
PHYAD0  
VIS  
(PD)  
Combined with PHYAD1 and PHYAD2, this  
configuration strap sets the transceiver’s SMI  
address.  
See Note 2.1 for more information on  
configuration straps.  
Note:  
Refer to Section 3.7.1, "PHYAD[2:0]:  
PHY Address Configuration," on  
page 36 for additional information.  
Receive  
Clock  
(MII Mode)  
RXCLK  
VO8  
In MII mode, this pin is the receive clock output.  
„ MII (100BASE-TX): 25MHz  
„ MII (10BASE-T): 2.5MHz  
PHY Address  
1
Configuration  
PHYAD1  
VIS  
(PD)  
Combined with PHYAD0 and PHYAD2, this  
configuration strap sets the transceiver’s SMI  
address.  
1
Strap  
See Note 2.1 for more information on  
configuration straps.  
Note:  
Refer to Section 3.7.1, "PHYAD[2:0]:  
PHY Address Configuration," on  
page 36 for additional information.  
Receive Data  
Valid  
RXDV  
VO8  
Indicates that recovered and decoded data is  
available on the RXD pins.  
1
Revision 1.4 (08-23-12)  
12  
SMSC LAN8710A/LAN8710Ai  
DATASHEET