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LAN8700IC-AEZG 参数 Datasheet PDF下载

LAN8700IC-AEZG图片预览
型号: LAN8700IC-AEZG
PDF下载: 下载PDF文件 查看货源
内容描述: [LAN Controller, 4 Channel(s), 12.5MBps, CMOS, 6 X 6 MM, 0.90 MM HEIGHT, ROHS COMPLIANT, QFN-36]
分类和应用: 通信时钟局域网数据传输外围集成电路
文件页数/大小: 83 页 / 687 K
品牌: SMSC [ SMSC CORPORATION ]
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint  
Datasheet  
Table 3.1 MII Signals (continued)  
SIGNAL NAME  
TYPE  
DESCRIPTION  
TX_CLK  
O
Transmit Clock: 25MHz in 100Base-TX mode. 2.5MHz in  
10Base-T mode.  
Note:  
Note:  
This signal is not used in RMII Mode.  
For proper TXCLK operation, RX_ER and RX_DV must  
NOT be driven high externally on a hardware reset or  
on a LAN8700 power up.  
RXD0/  
MODE0  
IOPU  
IOPU  
IOPU  
Receive Data 0: Bit 0 of the 4 data bits that are sent by the PHY  
in the receive path.  
PHY Operating Mode Bit 0: set the default MODE of the PHY.  
Note:  
See Section 5.4.9.2, "Mode Bus – MODE[2:0]," on  
page 56, for the MODE options  
RXD1/  
MODE1  
Receive Data 1: Bit 1 of the 4 data bits that are sent by the PHY  
in the receive path.  
PHY Operating Mode Bit 1: set the default MODE of the PHY.  
Note:  
See Section 5.4.9.2, "Mode Bus – MODE[2:0]," on  
page 56, for the MODE options.  
RXD2/  
MODE2  
Receive Data 2: Bit 2 of the 4 data bits that are sent by the PHY  
in the receive path.  
PHY Operating Mode Bit 2: set the default MODE of the PHY.  
Notes:  
„ RXD2 is not used in RMII Mode.  
„ See Section 5.4.9.2, "Mode Bus – MODE[2:0]," on page 56, for  
the MODE options.  
RXD3/  
nINTSEL  
IOPU  
Receive Data 3: Bit 3 of the 4 data bits that are sent by the PHY  
in the receive path.  
nINTSEL: On power-up or external reset, the mode of the  
nINT/TXER/TXD4 pin is selected.  
„ When RXD3/nINTSEL is floated or pulled to VDDIO, nINT is  
selected for operation on pin nINT/TXER/TXD4 (default).  
„ When RXD3/nINTSEL is pulled low to VSS through a resistor,  
(see Table 4.3, “Boot Strapping Configuration Resistors,” on  
page 33), TXER/TXD4 is selected for operation on pin  
nINT/TXER/TXD4.  
Notes:  
„ RXD3 is not used in RMII Mode  
„ If the nINT/TXER/TXD4 pin is configured for nINT mode, then  
a pull-up resistor is needed to VDDIO on the nINT/TXER/TXD4  
pin. see Table 4.3, “Boot Strapping Configuration Resistors,” on  
page 33.  
„ See Section 4.10, "nINT/TX_ER/TXD4 Strapping," on page 32  
for additional information on configuration/strapping options.  
SMSC LAN8700/LAN8700i  
Revision 2.3 (04-12-11)  
DATA1S3HEET