±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint
Datasheet
Table 3.1 MII Signals (continued)
SIGNAL NAME
TYPE
DESCRIPTION
RX_ER/
RXD4/
OPD
Receive Error: Asserted to indicate that an error was detected
somewhere in the frame presently being transferred from the
PHY.
MII Receive Data 4: In Symbol Interface (5B Decoding) mode,
this signal is the MII Receive Data 4 signal, the MSB of the
received 5-bit symbol code-group. Unless configured in this
mode, the pin functions as RX_ER.
Note:
This pin has an internal pull-down resistor, and must not
be high during reset. The RX_ER signal is optional in
RMII Mode.
RX_DV
O
Receive Data Valid: Indicates that recovered and decoded data
nibbles are being presented on RXD[3:0].
Note:
This pin has an internal pull-down resistor, and must not
be high during reset. This signal is not used in RMII
Mode.
RX_CLK/
REGOFF
IOPD
Receive Clock: In MII mode, this pin is the receive clock output.
25MHz in 100Base-TX mode. 2.5MHz in 10Base-T mode.
Note:
This signal is not used in RMII Mode.
Regulator Off: This pin pulled up to configure the internal 1.8V
regulator off. As described in Section 4.9, this pin is sampled
during the power-on sequence to determine if the internal
regulator should turn on. When the regulator is disabled, external
1.8V must be supplied to VDD_CORE, and the voltage at VDD33
must be at least 2.64V before voltage is applied to VDD_CORE.
COL/
RMII/
IOPD
MII Mode Collision Detect: Asserted to indicate detection of
collision condition.
CRS_DV
RMII – MII/RMII mode selection is latched on the rising edge of
the internal reset (nreset) based on the following strapping:
Float this pin for MII mode or pull-high with an external resistor
to VDDIO (see Table 4.3, “Boot Strapping Configuration
Resistors,” on page 33) to set the device in RMII mode.
See Section 4.6.3, "MII vs. RMII Configuration," on page 28 for
more details.
RMII Mode CRS_DV (Carrier Sense/Receive Data Valid)
Asserted to indicate when the receive medium is non-idle. When
a 10BT packet is received, CRS_DV is asserted, but RXD[1:0] is
held low until the SFD byte (10101011) is received. In 10BT, half-
duplex mode, transmitted data is not looped back onto the
receive data pins, per the RMII standard.
CRS/
IOPU
Carrier Sense: Indicates detection of carrier.
PHYAD4
Note:
This signal is mux’d with PHYAD4
Revision 2.3 (04-12-11)
SMSC LAN8700/LAN8700i
DATA1S4HEET
SMSC [ SMSC CORPORATION ]
