Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
Table 2.3 JTAG Pins
BUFFER
TYPE
NUM PINS
NAME
SYMBOL
DESCRIPTION
JTAG Test
Data Out
TDO
VO8
JTAG (IEEE 1149.1) data output.
1
JTAG Test
Data Input
TDI
VIS
(PU)
JTAG (IEEE 1149.1) data input.
1
1
1
Note:
When not used, tie this pin to
VDDVARIO.
JTAG Test
Clock
TCK
TMS
VIS
(PD)
JTAG (IEEE 1149.1) test clock.
Note:
When not used, tie this pin to VSS.
JTAG Test
Mode Select
VIS
(PU)
JTAG (IEEE 1149.1) test mode select.
Note:
When not used, tie this pin to
VDDVARIO.
Table 2.4 USB Pins
BUFFER
TYPE
NUM PINS
NAME
SYMBOL
DESCRIPTION
USB
DMINUS
USBDM
AIO
AIO
AI
Note:
The functionality of this pin may be
swapped to USB DPLUS via the Port
Swap bit of Configuration Flags 0.
1
USB
DPLUS
USBDP
Note:
The functionality of this pin may be
swapped to USB DMINUS via the Port
Swap bit of Configuration Flags 0.
1
1
External USB
Bias Resistor.
USBRBIAS
Used for setting HS transmit current level and on-
chip termination impedance. Connect to an
external 12K 1.0% resistor to ground.
Revision 1.0 (11-01-10)
SMSC LAN7500/LAN7500i
DATA1S4HEET
SMSC [ SMSC CORPORATION ]
