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LAN7500-ABZJ 参数 Datasheet PDF下载

LAN7500-ABZJ图片预览
型号: LAN7500-ABZJ
PDF下载: 下载PDF文件 查看货源
内容描述: [Serial I/O Controller, 0 Channel(s), 60MBps, CMOS, 8 X 8 MM, ROHS COMPLIANT, QFN-56]
分类和应用: 通信时钟数据传输外围集成电路
文件页数/大小: 56 页 / 616 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号LAN7500-ABZJ的Datasheet PDF文件第9页浏览型号LAN7500-ABZJ的Datasheet PDF文件第10页浏览型号LAN7500-ABZJ的Datasheet PDF文件第11页浏览型号LAN7500-ABZJ的Datasheet PDF文件第12页浏览型号LAN7500-ABZJ的Datasheet PDF文件第14页浏览型号LAN7500-ABZJ的Datasheet PDF文件第15页浏览型号LAN7500-ABZJ的Datasheet PDF文件第16页浏览型号LAN7500-ABZJ的Datasheet PDF文件第17页  
Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller  
Datasheet  
Table 2.1 GPIO Pins (continued)  
BUFFER  
TYPE  
NUM PINS  
NAME  
SYMBOL  
DESCRIPTION  
PME_MODE_SEL  
PME Mode  
Select  
VIS  
(PU)  
This pin may serve as the PME_MODE_SEL  
input when PME mode of operation is in effect.  
Refer to Chapter 4, "PME Operation," on page 30  
for additional information.  
1
General  
Purpose I/O 6  
GPIO6  
GPIO7  
GPIO8  
GPIO9  
GPIO10  
GPIO11  
VIS/VO8/ This General Purpose I/O pin is fully  
VOD8  
(PU)  
programmable as either a push-pull output, an  
open-drain output, or a Schmitt-triggered input.  
General  
Purpose I/O 7  
VIS/VO8/ This General Purpose I/O pin is fully  
programmable as either a push-pull output, an  
open-drain output, or a Schmitt-triggered input.  
1
1
1
1
1
VOD8  
(PU)  
General  
Purpose I/O 8  
VIS/VO6/ This General Purpose I/O pin is fully  
programmable as either a push-pull output, an  
open-drain output, or a Schmitt-triggered input.  
VOD6  
(PU)  
General  
Purpose I/O 9  
VIS/VO8/ This General Purpose I/O pin is fully  
programmable as either a push-pull output, an  
open-drain output, or a Schmitt-triggered input.  
VOD8  
(PU)  
General  
Purpose I/O  
10  
VIS/VO8/ This General Purpose I/O pin is fully  
programmable as either a push-pull output, an  
open-drain output, or a Schmitt-triggered input.  
VOD8  
(PU)  
General  
Purpose I/O  
11  
VIS/VO8/ This General Purpose I/O pin is fully  
programmable as either a push-pull output, an  
open-drain output, or a Schmitt-triggered input.  
VOD8  
(PU)  
Table 2.2 EEPROM Pins  
BUFFER  
NUM PINS  
NAME  
SYMBOL  
TYPE  
DESCRIPTION  
EEPROM  
Data In  
EEDI  
EEDO  
EECS  
VIS  
(PD)  
This pin is driven by the EEDO output of the  
external EEPROM.  
1
EEPROM  
Data Out  
VO8  
This pin drives the EEDI input of the external  
EEPROM.  
1
1
1
EEPROM  
Chip Select  
VO8  
This pin drives the chip select output of the  
external EEPROM.  
Note:  
The EECS output may tri-state briefly  
during power-up. Some EEPROM  
devices may be prone to false selection  
during this time. When an EEPROM is  
used, an external pull-down resistor is  
recommended on this signal to prevent  
false selection. Refer to your EEPROM  
manufacturer’s datasheet for additional  
information.  
EEPROM  
Clock  
EECLK  
VO8  
This pin drives the EEPROM clock of the external  
EEPROM.  
SMSC LAN7500/LAN7500i  
Revision 1.0 (11-01-10)  
DATA1S3HEET