NAME
Fast
GP Data
Fast
Table 4 - G. P. Port Signals
SIZE (BITS)
TYPE
DESCRIPTION
1
1
Output
Output
GP Data
The G.P. Data pin typically reflects the state of
General Purpose Data, bit 5 of SCE Line Control
Register A.
The state of G.P. Data is
independent of the IrCC 2.0 Block Controls or
the Output Multiplexer but will depend on the
ATC during transceiver programming cycles (see
the Automatic Transceiver Control section on
page 69).
General Purpose Data
General Purpose Data
The Fast pin always reflects the state of Fast, bit
6 of SCE Line Control Register A. The state of
Fast is independent of the IrCC 2.0 Block
Controls or the Output Multiplexer. The Fast pin
can be used at the chip level for IR Transceiver
configuration.
NAME
D0-D7
A0-A2
nIOR
nIOW
AEN
DRQ
nDACK
TC
IRQ
IOCHRDY
nSRDY
SIZE (BITS)
8
3
1
1
1
1
1
1
1
1
1
Table 5 - HOST Signals
TYPE
Bi-directional
Input
Input
Input
Input
Output
Input
Input
Output
Output
Output
Host Data Bus
DESCRIPTION
IrCC 2.0 Register Address Bus
ISA I/O Read
ISA I/O Write
ISA Address Enable
DMA Request
ISA DMA Acknowledge
ISA DMA Terminal Count
Interrupt Request
ISA I/O Channel Ready
ISA Synchronous Ready (Zero Wait State)
5