TAPE DRIVE REGISTER (TDR)
Address 3F3 READ/WRITE
Table 5 - Tape Select Bits
This register is included for 82077 software
compatibility. The robust digital data separator
used in the FDC does not require its
characteristics modified for tape support. The
contents of this register are not used internal to
DRIVE
SELECTED
TAPE SEL1
TAPE SEL2
0
0
1
1
0
1
0
1
None
1
2
3
the device.
The TDR is unaffected by a
Bits 2-7 are tri-stated when
software reset.
read in this mode.
Table 6 - Internal 2 Drive Decode - Normal
DRIVE SELECT
MOTOR ON OUTPUTS
(ACTIVE LOW)
DIGITAL OUTPUT REGISTER
OUTPUTS (ACTIVE LOW)
Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0
nDS1
nDS0
nMTR1
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nMTR0
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4
X
X
X
1
X
X
1
X
1
1
X
X
X
0
0
0
1
1
X
0
1
0
1
X
1
0
1
1
1
0
1
1
1
1
X
X
0
X
0
0
Table 7 - Internal 2 Drive Decode - Drives 0 and 1 Swapped
DRIVE SELECT
OUTPUTS (ACTIVE LOW)
MOTOR ON OUTPUTS
(ACTIVE LOW)
DIGITAL OUTPUT REGISTER
Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0
nDS1
nDS0
nMTR1
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nMTR0
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
X
X
X
1
X
X
1
X
1
1
X
X
X
0
0
0
1
1
X
0
1
0
1
X
0
1
1
1
1
1
0
1
1
1
X
X
0
X
0
0
21
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