nGPA
nGPCS*
nSMI*
SMI
nROMDIR
nROMCS
RD[0:7]
nGPWR*
BIOS
BUFFER
nPowerOn
Button_In
SOFT
POWER
POWER
MANAGEMENT
DECODER
MANAGEMENT
PD0-7
VTR
MULTI-MODE
PARALLEL
PORT/FDC
MUX
BUSY, SLCT, PE,
nERROR, nACK
DATA BUS
AB_DATA*
AB_CLK*
nSTB, nSLCTIN,
nINIT, nALF
ACCESS.bus
GP1[0:7]*
GP2[0:5]*
ADDRESS BUS
GENERAL
PURPOSE
I/O
DATAIN*
DATAOUT*
SERIAL
EEPROM
GP[4[0:7]*, GP5[0:1,3:4]*,
GP6[0:7]*, GP7[0:7]*
CLK*, ENABLE*
TXD1, nCTS1, nRTS1
CONFIGURATION
REGISTERS
16C550
COMPATIBLE
SERIAL
RXD1
nIOR
nIOW
PORT 1
nDSR1, nDCD1, nRI1, nDTR1
CONTROL BUS
AEN
SA[0:12] (nCS)
SA[13-15]
IRR3*/Mode*
IRRX*, IRTX*
WDATA
16C550
COMPATIBLE
SERIAL
PORT 2 WITH
INFRARED
TXD2(IRTX), nCTS2, nRTS2
WCLOCK
HOST
CPU
RXD2(IRRX)
SMC
PROPRIETARY
82077
SD[O:7]
nDSR2, nDCD2, nRI2, nDTR2
DIGITAL
DATA
SEPARATOR
WITH WRITE
PRECOM-
INTERFACE
nHDCS2,3
IDE2_IRQ
COMPATIBLE
DRQ[0:3]
IDE2
OPTIONAL
VERTICAL
FLOPPYDISK
CONTROLLER
nDACK[0:3]
PENSATION
IDE1_IRQ
CORE
nIDE1_OE
nIOWOP
nIOROP
IDE
RCLOCK
RDATA
TC
IRQ[1,3-12,14,15]
RESET_DRV
INTERFACE
nHDCS0, nHDCS1
CLOCK
KCLK
KDATA
GEN
8042
RTC
IOCHRDY
MCLK
MDATA
DENSEL
nINDEX
nTRK0
nDS0,1
nDIR nMTR0,1
nSTEP DRVDEN0
P20*, P21*
P12*, P13*, P14*,P15*, P16*, P17*
nWDATAnRDATA
nDSKCHG
nWRPRT
nWGATE
XTAL1,2
VBAT
DRVDEN1
nHDSEL
MID0, MID1
ICLOCK
(14.318)
HCLK
16CLK
Vcc Vss
CLKO[1:3]
(14.318)
*Multi-Function I/O Pin - Optional
FIGURE 1 - FDC37C93xFR BLOCK DIAGRAM
13
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