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FDC37CXFR 参数 Datasheet PDF下载

FDC37CXFR图片预览
型号: FDC37CXFR
PDF下载: 下载PDF文件 查看货源
内容描述: 即插即用兼容超I / O控制器,提供快速IR [Plug and Play Compatible Ultra I/O Controller with Fast IR]
分类和应用: 控制器
文件页数/大小: 258 页 / 898 K
品牌: SMSC [ SMSC CORPORATION ]
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IDE OUTPUT ENABLES  
output enables treat all IDE transfers as 16 bit  
transfers.  
Two IDE output Enables are available. The IDE  
nIDE1_OE  
IDE1 (1)  
IDE1&IDE2 (3)  
nIDE2_OE  
IDE2 (2)  
Option 1  
Option 2  
(Not used)  
Note 1: The low and high byte transfer for IDE1 goes through external buffers controlled by IDE1_OE.  
(Refer to Option 1)  
Note 2: The low and high byte transfer for IDE2 goes through external buffers controlled by IDE2_OE.  
(Refer to Option 1)  
Note 3: The low and high byte transfers of IDE1 and IDE2 go through one set of external buffers  
controlled by IDE1. (Refer to Option 2)  
buffer that can be used for a BIOS Buffer. If the  
BIOS buffer is not used, then nROMCS and  
nROMDIR must be tied high so as not to  
interfere with the boot ROM. This function  
allows data transmission from the RD bus to the  
SD bus or from the SD bus to the RD bus. The  
direction of the transfer is controlled by  
nROMDIR. The enable input, nROMCS, can be  
used to disable the transfer and isolate the  
buses.  
HDCS0 and HDCS1 of IDE1 as General  
Purpose Address Decoders  
HDCS0 and HDCS1 of IDE1, initially configured  
to support IDE drives, can be programmed as  
general purpose address decoders. Refer to the  
Configuration Register Section, Logical Device  
1, CRF0 and CRF1.  
BIOS BUFFER  
The FDC37C93xFR contains one 245 type  
nROMCS  
nROMDIR  
DESCRIPTION  
RD[0:7] data to SD[0:7] bus  
SD[0:7] data to RD[0:7]  
Isolation  
L
L
L
H
X
H
117  
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