t1
t2
t2
X1K
t4
nRESET
units
Parameter
min
typ
max
ns
ns
us
65
Clock CycleTime for 14.318MHz
70
35
t1
t2
Clock High Time/Low Time for
14.318MHz
31.25
16.53
Clock Cycle Time for 32kHz
t1
t2
us
Clock High Time/Low Time for 32kHz
ns
us
5
Clock Rise Time/Fall Time (not shown)
nRESET Low Time
1.5
t4
The nRESET low time is dependent upon the processor clock.
The nRESET must be active for a minimum of 1.5us.
FIGURE 11 - CLOCK TIMING
SMSC DS – FDC37N3869
Page 120
Rev. 10/25/2000