DESCRIPTION OF PIN FUNCTIONS
NAME TOTAL
PIN
No./QFP
BUFFER
TYPE
SYMBOL
PROCESSOR/HOST INTERFACE (34)
37:40,
42:45
21:31
20
System Data Bus
8
SD[0:7]
IO24
11 bit System Address Bus
Chip Select/SA11 (Note 1)
Address Enable
11
1
1
1
1
1
1
1
1
1
1
1
1
SA[0:10]
nCS/SA11
AEN
I
I
I
34
55
I/O Channel Ready
IOCHRDY
RESET_DRV
SER_IRQ
PCI_CLK
DRQ1
OD24
IS
46
ISA Reset Drive
33
Serial IRQ
IO24
IO24
O24
O24
O24/IO24
I
32
PCI Clock for Serial IRQ (33 MHz/30 MHz)
DMA Request 1
48
50
DMA Request 2
DRQ2
52
DMA Request 3/8042 P12
DMA Acknowledge 1
DMA Acknowledge 2
DMA Acknowledge 3/8042 P16
DRQ3/P12
nDACK1
nDACK2
47
49
I
51
nDACK3/
P16
I/IO24
54
35
36
Terminal Count
I/O Read
1
1
1
TC
I
I
I
nIOR
nIOW
I/O Write
CLOCKS (1)
14.318MHz Clock Input
19
1
CLOCKI
ICLK
INFRARED INTERFACE (2)
61
62
Infrared Rx
Infrared Tx
1
1
IRRX
IRTX
I
O24
POWER PINS (8)
18,53,
65,93
Power
VCC
VSS
7,41,
Ground
60,76
FDD INTERFACE (16)
16
11
10
Read Disk Data
Write Gate
1
1
1
nRDATA
nWGATE
nWDATA
IS
O24/OD24
O24/OD24
Write Disk Data
6
SMSC [ SMSC CORPORATION ]
