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FDC37M607 参数 Datasheet PDF下载

FDC37M607图片预览
型号: FDC37M607
PDF下载: 下载PDF文件 查看货源
内容描述: 增强的超级I / O控制器,红外支持 [ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT]
分类和应用: 控制器
文件页数/大小: 182 页 / 634 K
品牌: SMSC [ SMSC CORPORATION ]
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Table 24 describes the effect of the SK bit on  
the Read Deleted Data command execution and  
results.  
Read Deleted Data  
This command is the same as the Read Data  
command, only it operates on sectors that  
contain a Deleted Data Address Mark at the  
beginning of a Data Field.  
Except where noted in Table 24, the C or R  
value of the sector address is automatically  
incremented (see Table 25).  
Table 24 - Skip Bit vs. Read Deleted Data Command  
DATA ADDRESS  
MARK TYPE  
ENCOUNTERED  
SK BIT  
VALUE  
RESULTS  
SECTOR CM BIT OF  
DESCRIPTION  
OF RESULTS  
READ?  
ST2 SET?  
0
Normal Data  
Yes  
Yes  
Address not  
incremented.  
Next sector not  
searched for.  
Normal  
0
1
Deleted Data  
Normal Data  
Yes  
No  
No  
termination.  
Normal  
Yes  
termination.  
Sector not read  
("skipped").  
Normal  
1
Deleted Data  
Yes  
No  
termination.  
the ND flag of Status Register 1 to a "1" if there  
is no comparison. Multi-track or skip operations  
are not allowed with this command. The MT and  
SK bits (bits D7 and D5 of the first command  
byte respectively) should always be set to "0".  
Read A Track  
This command is similar to the Read Data  
command except that the entire data field is  
read continuously from each of the sectors of a  
track. Immediately after encountering a pulse  
on the nINDEX pin, the FDC starts to read all  
data fields on the track as continuous blocks of  
data without regard to logical sector numbers. If  
the FDC finds an error in the ID or DATA CRC  
check bytes, it continues to read data from the  
track and sets the appropriate error bits at the  
end of the command. The FDC compares the  
ID information read from each sector with the  
specified value in the command and sets  
This command terminates when the EOT  
specified number of sectors has not been read.  
If the FDC does not find an ID Address Mark on  
the diskette after the second occurrence of a  
pulse on the IDX pin, then it sets the IC code in  
Status Register  
0
to "01" (abnormal  
termination), sets the MA bit in Status Register  
1 to "1", and terminates the command.  
54  
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