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FDC37C669-MT 参数 Datasheet PDF下载

FDC37C669-MT图片预览
型号: FDC37C669-MT
PDF下载: 下载PDF文件 查看货源
内容描述: [Floppy Disk Drive, 0.25MBps, IDE Compatible, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100]
分类和应用: 数据传输PC驱动外围集成电路驱动器
文件页数/大小: 162 页 / 617 K
品牌: SMSC [ SMSC CORPORATION ]
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DATA RATE SELECT REGISTER (DSR)  
Microchannel applications. Other applications can set the  
data rate in the DSR. The data rate of the floppy  
controller is the most recent write of either the DSR or  
Address 3F4 WRITE ONLY  
This register is write only. It is used to program the data  
rate, amount of write precompensation, power down  
status, and software reset. The data rate is programmed  
using the Configuration Control Register (CCR) not the  
DSR, for PC/AT and PS/2 Model 30 and  
CCR. The DSR is unaffected by a software reset. A  
hardware reset will set the DSR to 02H, which  
corresponds to the default precompensation setting and  
250 kbps.  
7
6
5
0
4
3
2
1
0
S/W  
POWER  
PRE-  
PRE-  
PRE-  
DRATE DRATE  
RESET DOWN  
COMP2 COMP1 COMP0 SEL1  
SEL0  
RESET  
COND.  
0
0
0
0
0
0
1
0
BIT 0 and 1 DATA RATE SELECT  
floppy controller clock and data separator circuits will be  
turned off. The controller will come out of manual low  
power mode after a software reset or access to the Data  
Register or Main Status Register.  
These bits control the data rate of the floppy controller.  
See Table 13 for the settings corresponding to the  
individual data rates. The data rate select bits are  
unaffected by a software reset, and are set to 250 kbps  
after a hardware reset.  
BIT 7 SOFTWARE RESET  
This active high bit has the same function as the DOR  
RESET (DOR bit 2) except that this bit is self clearing.  
BIT 2 through 4 PRECOMPENSATION SELECT  
These three bits select the value of write  
precompensation that will be applied to the WDATA  
output signal. Table 12 shows the precompensation  
values for the combination of these bits settings. Track 0  
is the default starting track number to start  
precompensation. this starting track number can be  
changed by the configure command.  
Table 10 - Precompensation Delays  
PRECOMP  
432  
PRECOMPENSATION DELAY  
111  
001  
010  
011  
100  
101  
110  
000  
0.00 ns-DISABLED  
41.67 ns  
83.34 ns  
125.00 ns  
166.67 ns  
208.33 ns  
BIT 5 UNDEFINED  
Should be written as a logic "0".  
250.00 ns  
BIT 6 LOW POWER  
A logic "1" written to this bit will put the floppy controller  
into Manual Low Power mode. The  
Default (See Table 14)  
27  
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