CR0C
register after power up is 00H. This register controls the
operating mode of the UART. This register is reset to the
default state by a POR or a hardware reset.
This register can only be accessed in the Configuration
Mode and after the CSR has been initialized to 0CH. The
default
value
of
this
Table 56 - CR0C
BIT NO.
BIT NAME
DESCRIPTION
0
UART 2 RCV 1 = RX input inverted.
Polarity
0 = RX input non - inverted (default).
1
2
UART 2 XMIT 1 = TX output inverted.
Polarity
0 = TX output non - inverted (default).
UART 2 Duplex This bit is used to define the FULL/HALF
DUPLEX operation of UART 2.
1 = Half duplex
0 = Full duplex (default)
3, 4, 5
UART 2 MODE UART 2 Mode
5 4 3
0 0 0Standard (default)
0 0 1IrDA (HPSIR)
0 1 0Amplitude Shift Keyed IR @ 500Khz
0 1 1Reserved
1 x xReserved
6
7
UART 1 Speed This bit enables the high speed mode of UART
1 = High speed enabled
0 = Standard (default)
UART Speed This bit enables the high speed mode of UART
1 = High speed enabled
0 = Standard (default)
CR0D
CR0E
This register can only be accessed in the Configuration
Mode and after the CSR has been initialized to 0DH.
This register is read only. This is the Device ID. The
default value of this register after power up is 03H.
This register can only be accessed in the Configuration
Mode and after the CSR has been initialized to 0EH.
This register is read only. The default value of this
register after power up is 02H. This is used to identify the
chip revision level.
127
SMSC [ SMSC CORPORATION ]
