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FDC37B72X_07 参数 Datasheet PDF下载

FDC37B72X_07图片预览
型号: FDC37B72X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 128引脚增强型超级I / O控制器,支持ACPI [128 Pin Enhanced Super I/O Controller with ACPI Support]
分类和应用: 控制器
文件页数/大小: 238 页 / 816 K
品牌: SMSC [ SMSC CORPORATION ]
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has elapsed. If the host issues another command  
before the head unloads, then the head settling  
time may be saved between subsequent reads.  
After reading the ID and Data Fields in each  
sector, the FDC checks the CRC bytes. If a CRC  
error occurs in the ID or data field, the FDC sets  
the IC code in Status Register 0 to "01" indicating  
abnormal termination, sets the DE bit flag in Status  
Register 1 to "1", sets the DD bit in Status Register  
2 to "1" if CRC is incorrect in the ID field, and  
terminates the Read Data Command. Table 21  
describes the effect of the SK bit on the Read  
Data command execution and results. Except  
where noted in Table 21, the C or R value of the  
sector address is automatically incremented (see  
Table 23).  
If the FDC detects a pulse on the nINDEX pin  
twice without finding the specified sector (meaning  
that the diskette's index hole passes through index  
detect logic in the drive twice), the FDC sets the IC  
code in Status Register 0 to  
"01" indicating  
abnormal termination, sets the ND bit in Status  
Register 1 to "1" indicating a sector not found, and  
terminates the Read Data Command.  
TABLE 24 - EFFECTS OF MT AND N BITS  
MAXIMUM TRANSFER  
FINAL SECTOR READ  
FROM DISK  
26 at side 0 or 1  
26 at side 1  
15 at side 0 or 1  
15 at side 1  
8 at side 0 or 1  
16 at side 1  
MT  
0
1
0
1
N
1
1
2
2
3
3
CAPACITY  
256 x 26 = 6,656  
256 x 52 = 13,312  
512 x 15 = 7,680  
512 x 30 = 15,360  
1024 x 8 = 8,192  
1024 x 16 = 16,384  
0
1
54  
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