TABLE 95 - EPP 1.7 DAT OR ADDRESS READ CYCLE TIMING
NAME
t2
t3
t4
t5
DESCRIPTION
nIOR Deasserted to Command Deasserted
nWAIT Asserted to IOCHRDY Deasserted
Command Deasserted to PDATA Hi-Z
Command Asserted to PDATA Valid
nIOR Asserted to IOCHRDY Asserted
nWAIT Deasserted to IOCHRDY Deasserted
IOCHRDY Deasserted to nIOR Deasserted
nIOR Deasserted to SDATA High-Z (Hold Time)
PDATA Valid to SDATA Valid
Time Out
Ax Valid to nIOR Asserted
nIOR Deasserted to Ax Invalid
Command Deasserted to nWAIT Deasserted
nIOR Deasserted to nIOW or nIOR Asserted
nIOR Asserted to Command Asserted
MIN
TYP
MAX
50
40
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
0
0
0
t8
24
50
t10
t11
t12
t13
t15
t19
t20
t21
t22
t23
0
0
40
40
12
10
40
10
0
40
ns
ns
55
Note:
WRITE is controlled by setting the PDIR bit to "1" in the control register before performing an EPP
Read.
228
SMSC [ SMSC CORPORATION ]
