REGISTER
ADDRESS
DESCRIPTION
STATE
Bit[7:1] Configuration Address Bits [7:1]
Bit[0] = 0
See Note 1 Below
Configuration
Address Byte 0
0x26
C
Default=0xF0
(Sysopt=0)
=0x70 (Sysopt=1)
on Vcc POR or
Reset_Drv
Configuration
Address Byte 1
0x27
Bit[7:0] Configuration Address Bits [15:8]
See Note 1 Below
C
Default = 0x03
on Vcc POR or
Reset_Drv
Chip Level
0x28 -0x2A Reserved - Writes are ignored, reads return 0.
Vendor Defined
TEST 4
TEST 5
TEST 1
TEST 2
0x2B R/W Test Modes: Reserved for SMSC. Users should not write
to this register, may produce undesired results.
C
C
C
C
0x2C R/W Test Modes: Reserved for SMSC. Users should not write
to this register, may produce undesired results.
0x2D R/W Test Modes: Reserved for SMSC. Users should not write
to this register, may produce undesired results.
0x2E R/W Test Modes: Reserved for SMSC. Users should not write
to this register, may produce undesired results.
TEST 3
0x2F R/W Test Modes: Reserved for SMSC. Users should not write
to this register, may produce undesired results.
C
Default = 0x00,
on Vcc POR or
Reset_Drv
hardware signal.
Note 1: To allow the selection of the configuration address to a user defined location, these Configuration
Address Bytes are used. There is no restriction on the address chosen, except that A0 is 0, that
is, the address must be on an even byte boundary. As soon as both bytes are changed, the
configuration space is moved to the specified location with no delay (Note: Write byte 0, then byte
1; writing CR27 changes the base address).
The configuration address is only reset to its default address upon a Hard Reset or Vcc POR.
Note: The default configuration address is either 3F0 or 370, as specified by the SYSOPT pin.
This change affects SMSC Mode only.
168
SMSC [ SMSC CORPORATION ]
