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FDC37B72X_07 参数 Datasheet PDF下载

FDC37B72X_07图片预览
型号: FDC37B72X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 128引脚增强型超级I / O控制器,支持ACPI [128 Pin Enhanced Super I/O Controller with ACPI Support]
分类和应用: 控制器
文件页数/大小: 238 页 / 816 K
品牌: SMSC [ SMSC CORPORATION ]
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HARD  
RESET  
Vbat  
POR  
SOFT  
RESET  
CONFIGURATION  
REGISTER  
INDEX  
TYPE  
Vcc POR  
Vtr POR  
LOGICAL DEVICE A CONFIGURATION REGISTERS (ACPI)  
0x30  
R/W  
R/W  
0x00  
0x00  
0x00  
-
-
0x00  
Activate 4  
0x60,  
0x00,  
0x00  
0x00,  
0x00  
0x00,  
0x00  
0x00,  
0x00  
Primary Base I/O Address  
PM1_BLK  
0x61 (2)  
0x70  
0xF0  
R/W  
R/W  
-
-
-
-
-
-
0x00  
0x00  
-
-
Primary Interrupt Select 3  
Sleep/Wake Configuration 3  
Notes  
Note 0: CR22 Bit 5 is reset on Vtr POR only  
Note 1: This register contains some bits which are read or write only.  
Note 2: Register 60 is the high byte; 61 is the low byte. For example to set the primary base address to  
1234h, write 12h into 60, and 34h into 61.  
Note 3: These configuration registers are powered by Vtr and battery backed up.  
Note 4: The Activate bit for Logical Device A does not effect the generation of an interrupt (SCI).  
Note 5: Bits[0,2-7] are cleared on a VCC POR or RESET_DRV.  
165  
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