Environmental Monitoring and Control Device
Datasheet
Chapter 10 Timing Diagrams
10.1 PWM Outputs
The following sections show the timing for the PWM[1:3] outputs.
10.1.1 WITH SYNCHRONIZATION
t1
t3
t4
t2
FANx
FIGURE 10.1 - PWMX OUTPUT TIMING, SYNC_MSK=0
10.1.2 WITHOUT SYNCHRONIZATION
t1
t2
FANx
FIGURE 10.2 - PWMX OUTPUT TIMING, SYNC_MSK=1
Table 10.1 - Timing for PWM[1:3] outputs
NAME
DESCRIPTION
MIN
TYP
MAX
90.9
99.6
UNITS
msec
%
usec
usec
PWM Period (Note 1)
PWM High Time (Note 2)
Sync Pulse Period
11.4
t1
t2
t3
t4
0
711.11
44.44
Sync Pulse High Time
Note 1: This value is programmable by the PWM frequency bits located in the FRFx registers
Note 2: The PWM High Time is based on a percentage of the total PWM period (min=0/256*TPWM, max
=255/256*TPWM). During Spin-up the PWM High Time can reach a 100% or Full On. (TPWM = t1)
SMSC EMC6D100/EMC6D101
Page 71
Rev. 09-09-04
DATASHEET
SMSC [ SMSC CORPORATION ]
