Multiple RPM-Based PWM Fan Controller for Five Fans
Datasheet
5.19
Software Lock Register
Table 5.29 Software Lock Register
ADDR
EFh
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Software
Lock
R/W
-
-
-
-
-
-
-
LOCK
00h
The Software Lock Register controls the software locking of critical registers. This register is software
locked.
Bit 0 - LOCK - this bit acts on all registers that are designated SWL. When this bit is set, the locked
registers become read only and cannot be updated.
‘0’ (default) - all SWL registers can be updated normally.
‘1’ - all SWL registers cannot be updated and a hard-reset is required to unlock them.
5.20
Product Features Register
Table 5.30 Product Features Register
ADDRESS
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Product
Features
FCh
R
-
-
ADR[2:0]
FAN_SPD [2:0]
00h
The Product Features register shows those functions that are enabled by external pin states.
Bits 5-3 - ADR[2:0] - Indicates the selected SMBus address as determined by the ADDR_SEL pin.
Table 5.31 ADDR_SEL Pin Configuration
ADR[2:0]
SLAVE ADDRESS
2
1
0
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0101_110(r/w)
0101_111(r/w)
0101_100(r/w)
0101_101(r/w)
1001_100(r/w)
1001_101(r/w)
Bits 2-0 - FAN_SPD[2:0] - Indicates the selected fan speed if the CLK pin pull-up decode is enabled
via the ADDR_SEL pin.
Revision 1.1 (10-12-09)
SMSC EMC2305
DATA4S8HEET
SMSC [ SMSC CORPORATION ]
