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EMC2305-1-AP-TR 参数 Datasheet PDF下载

EMC2305-1-AP-TR图片预览
型号: EMC2305-1-AP-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 多基于RPM的PWM风扇控制器五迷 [Multiple RPM-Based PWM Fan Controller for Five Fans]
分类和应用: 稳压器开关式稳压器或控制器风扇电源电路开关式控制器
文件页数/大小: 55 页 / 799 K
品牌: SMSC [ SMSC CORPORATION ]
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Multiple RPM-Based PWM Fan Controller for Five Fans  
Datasheet  
Table 5.1 EMC2305 Register Set (continued)  
REGISTER  
NAME  
DEFAULT  
VALUE  
ADDR  
R/W  
FUNCTION  
LOCK  
PAGE  
Lock Register  
EF  
R/W  
Software Lock  
Locks all SWL registers  
Revision Registers  
00h  
SWL  
Page 48  
Indicates functions determined upon  
device power up by external pin states  
FCh  
R
Product Features  
00h  
No  
Page 48  
FDh  
FEh  
FFh  
R
R
R
Product ID  
Manufacturer ID  
Revision  
Stores the unique Product ID  
Stores the Manufacturer ID  
Revision  
34h  
5Dh  
80h  
No  
No  
No  
Page 49  
Page 49  
Page 49  
During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when  
power is first applied to the part and the voltage on the VDD supply surpasses the POR level as  
specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to  
undefined registers will not have an effect.  
5.1.1  
Lock Entries  
The Lock Column describes the locking mechanism, if any, used for individual registers. All SWL  
registers are Software Locked and therefore made read-only when the LOCK bit is set.  
5.2  
Configuration Register  
Table 5.2 Configuration Register  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
USE_  
EXT_  
CLK  
DR_EXT_  
CLK  
20h  
R/W  
Configuration MASK  
DIS_TO WD_EN  
-
-
-
40h  
The Configuration Register controls the basic functionality of the EMC2305. The bits are described  
below. The Configuration Register is software locked.  
Bit 7 - MASK - Blocks the ALERT# pin from being asserted.  
„
‘0’ (default) - The ALERT# pin is unmasked. If any bit in either status register is set, the ALERT#  
pins will be asserted (unless individually masked via the Mask Register).  
„
‘1’ - The ALERT# pin is masked and will not be asserted.  
Bit 6 - DIS_TO - Disables the SMBus timeout function for the SMBus client (if enabled).  
„
„
‘0’ - The SMBus timeout function is enabled.  
‘1’ (default) - The SMBus timeout function is disabled allowing the device to be fully I2C compliant.  
Bit 5 - WD_EN - Enables the Watchdog timer to operate in Continuous Mode (see Section 4.8.2).  
„
‘0’ (default) - The Watchdog timer does not operate continuously. It will function upon power up and  
at no other time.  
„
‘1’ - The Watchdog timer operates continuously as described in Section 4.8.  
SMSC EMC2305  
Revision 1.1 (10-12-09)  
DATA3S1HEET