欢迎访问ic37.com |
会员登录 免费注册
发布采购

EMC2302-1-AIZL-TR 参数 Datasheet PDF下载

EMC2302-1-AIZL-TR图片预览
型号: EMC2302-1-AIZL-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 基于RPM的双PWM风扇控制器 [Dual RPM-Based PWM Fan Controller]
分类和应用: 风扇控制器
文件页数/大小: 44 页 / 627 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第21页浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第22页浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第23页浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第24页浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第26页浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第27页浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第28页浏览型号EMC2302-1-AIZL-TR的Datasheet PDF文件第29页  
Dual RPM-Based PWM Fan Controller  
Datasheet  
Table 5.1 EMC2302 Register Set (continued)  
FUNCTION  
REGISTER  
NAME  
DEFAULT  
VALUE  
ADDR  
R/W  
LOCK  
PAGE  
Fan 2 Valid TACH  
Count  
Holds the tachometer reading that  
indicates Fan 2 is spinning properly  
49h  
R/W  
F5h  
00h  
00h  
F8h  
FFh  
FFh  
F8h  
SWL  
Page 36  
Fan 2 Drive Fail  
Band Low Byte  
Stores the number of Tach counts used  
to determine how the actual fan speed  
must match the target fan speed at full  
scale drive  
4Ah  
4Bh  
4Ch  
4Dh  
4Eh  
4Fh  
R/W  
R/W  
R/W  
R/W  
R
SWL  
SWL  
No  
Page 37  
Fan 2 Drive Fail  
Band High Byte  
TACH 2 Target  
Low Byte  
Holds the target tachometer setting low  
byte for Fan 2  
Page 37  
Page 37  
Page 38  
Page 38  
TACH 2 Target  
High Byte  
Holds the target tachometer setting high  
byte for Fan 2  
No  
TACH 2 Reading  
High Byte  
Holds the tachometer reading high byte  
for Fan 2  
No  
TACH 2 Reading  
Low Byte  
Holds the tachometer reading low byte  
for Fan 2  
R
No  
Lock Register  
Locks all SWL registers  
Revision Registers  
EF  
R/W  
Software Lock  
00h  
SWL  
Page 39  
FDh  
FEh  
FFh  
R
R
R
Product ID  
Manufacturer ID  
Revision  
Stores the unique Product ID  
Stores the Manufacturer ID  
Revision  
36h  
5Dh  
80h  
No  
No  
No  
Page 39  
Page 39  
Page 39  
During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when  
power is first applied to the part and the voltage on the VDD supply surpasses the POR level as  
specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to  
undefined registers will not have an effect.  
5.1.1  
Lock Entries  
The Lock Column describes the locking mechanism, if any, used for individual registers. All SWL  
registers are Software Locked and therefore made read-only when the LOCK bit is set.  
5.2  
Configuration Register  
Table 5.2 Configuration Register  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
USE_  
EXT_  
CLK  
DR_EXT_  
CLK  
20h  
R/W  
Configuration MASK  
DIS_TO WD_EN  
-
-
-
40h  
The Configuration Register controls the basic functionality of the EMC2302. The bits are described  
below. The Configuration Register is software locked.  
Bit 7 - MASK - Blocks the ALERT# pin from being asserted.  
SMSC EMC2302  
Revision 1.1 (10-12-09)  
DATA2S5HEET  
 复制成功!