Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
Note: The Interrupt Enable 2 (Fan Tachs) register at offset 80h defaults to enabled for the individual
tachometer status events bits. The group Fan Tach INT# bit defaults to disabled. This bit needs
to be set if Fan Tach interrupts are to be generated on the external INT# pin.
See Figure 6.3 Interrupt Control on page 24.
7.1.5
Linking Fan Tachometers to PWMs
The TACH/PWM Association Register at offset 81h is used to associate a Tachometer input with a
PWM output. This association has three purposes:
1. The auto fan control logic supports a feature called SpinUp Reduction. If SpinUp Reduction is
enabled (SUREN bit), the auto fan control logic will stop driving the PWM output high if the
associated TACH input is operating within normal parameters. (Note: SUREN bit is located in the
Configuration Register at offset 7Fh)
2. To measure the tachometer input in Mode 2, the tachometer logic must know when the associated
PWM is ‘ON’.
3. Inhibit fan tachometer interrupts when the associated PWM is ‘OFF’.
See the description of the PWM_TACH register. The default configuration is:
PWM1 -> TACH1.
PWM2 -> TACH2.
PWM3 -> TACH3 & TACH4.
Revision 0.2 (06-14-06)
SMSC EMC2300
DATA4S4HEET
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