RPM-Based Fan Controller with Multiple Temperature Zones & Hardware Thermal Shutdown
Datasheet
Table A.4 Fan Speed Determination for Example #1 (using settings in Table A.3)
EXTERNAL
DIODE 1
TEMPERATURE
(CPU)
EXTERNAL
DIODE 2
TEMPERATURE
(GPU)
EXTERNAL
DIODE 3
TEMPERATURE
(SKIN)
INTERNAL DIODE
TEMPERATURE
(AMBIENT)
PWM RESULT
70% (CPU temp
requires highest drive)
Example 1:
Example 2:
Example 3:
82°C
97°C
97°C
48°C
62°C
62°C
58°C
58°C
75°C
82°C
82C°
82°C
80% (GPU and Skin
require highest drive)
100% (Internal temp
requires highest drive)
A.2
Example #2
This example uses the RPM-based Fan Speed Control Algorithm. The Spin Level (used by the Spin
Up Routine) should be changed to 40% drive for a total Spin Time of 1 second. For all other RPM
configuration settings, the default conditions are used.
For control inputs, it uses the External Diode 1 channel normally, the External Diode 2 channel
normally, and both Pushed Temperature registers in DTS format. The configuration is set as shown in
Table A.5, "Look Up Table Example #2 Configuration" while Table A.6, "Fan Speed Control Table
Example #2" shows how the table is loaded.
Note that when using DTS data, the USE_DTS_F1 and / or USE_DTS_F2 bits should be set. The
Pushed Temperature Registers are loaded with the normal DTS values as received by the processor.
When the DTS value is used by the Look Up Table, the value that is stored in the Pushed Temperature
Register is subtracted from a fixed temperature of 100°C. This resultant value is then compared
against the Look Up Table thresholds normally. When programming the Look Up Table, it is necessary
to take this translation into account or else incorrect settings may be selected.
Table A.5 Look Up Table Example #2 Configuration
ADDR
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
SETTING
DRIVE_FAIL_CNT
[1:0]
NOKICK
0
SPIN_LVL[2:0]
1
SPINUP_TIME [1:0]
Fan Spin Up
Configuration
46h
0Ah
0
0
0
0
1
0
USE_
DTS_F1
USE_
DTS_F2
LUT_
LOCK
RPM /
PWM
PUSH1_ TEMP1_ TEMP3_ TEMP4_
LUT
CFG
CFG
CFG
CFG
50h
E5h
Configuration
1
1
1
0
0
0
1
1
A.2.1
Fan Spin Up Configuration Bit Description
Bits 7-6 - DRIVE_FAIL_CNT[1:0] = ‘00b’ tells the circuitry that the drive fail detection circuitry is not
enabled. This is the default setting.
Bit 5 - NOKICK = ‘0b’ tells the circuitry that if than Spin Up Routine is invoked, it will drive to 100%
duty cycle for 25% of the spin up time. This is the default setting.
Bits 4-2 - SPIN_LVL[2:0] = ‘010b’ tells the circuitry that if the Spin Up Routine is invoked, it should run
at 40% drive.
Revision 1.2 (10-08-09)
SMSC EMC2113
DATA8S2HEET
SMSC [ SMSC CORPORATION ]
